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SUPERSOL

Solution processed low-dimensional oxide semiconducting structures and devices

Total Cost €

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EC-Contrib. €

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Partnership

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Project "SUPERSOL" data sheet

The following table provides information about the project.

Coordinator
IMPERIAL COLLEGE OF SCIENCE TECHNOLOGY AND MEDICINE 

Organization address
address: SOUTH KENSINGTON CAMPUS EXHIBITION ROAD
city: LONDON
postcode: SW7 2AZ
website: http://www.imperial.ac.uk/

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country United Kingdom [UK]
 Project website http://www.imperial.ac.uk
 Total cost 195˙454 €
 EC max contribution 195˙454 € (100%)
 Programme 1. H2020-EU.1.3.2. (Nurturing excellence by means of cross-border and cross-sector mobility)
 Code Call H2020-MSCA-IF-2014
 Funding Scheme MSCA-IF-EF-ST
 Starting year 2015
 Duration (year-month-day) from 2015-09-07   to  2017-09-06

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    IMPERIAL COLLEGE OF SCIENCE TECHNOLOGY AND MEDICINE UK (LONDON) coordinator 195˙454.00

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 Project objective

Progress in thin-film transistor (TFTs) over the past 40 years has been based primarily on the development/processing of new materials and on implementation of innovative device architectures together with new material combinations. The SUPERSOL project is a highly multidisciplinary research effort that aims to develop the next generation TFT technology based primarily on solution-processable low-dimensional (ultra-thin) metal oxide structures. The most important aspects of the technology include; (i) the potential for low-cost and scalable manufacturing, and (ii) performance characteristics well beyond the current state-of-the-art. To achieve these objectives I will develop low-dimensional metal oxide superlattices (SLs) comprised of sequentially deposited (via solution methods) dissimilar ultra-thin metal oxide layers. Device fabrication will be performed solely from solution methods such as spin casting, dip-coating and ultrasonic spray pyrolysis at plastic-compatible temperatures (100-200°C). By exploring the charge transport phenomena occurring at the critical 2DEG interfaces, I will be able to develop transistors with carrier mobility well beyond incumbent technologies (i.e. poly-Si TFTs with carrier mobility ~70 cm2/Vs). The first part of the project I will investigate the critical conditions that determine the formation of 2DEG systems within the oxide SLs. Best performing oxide SLs will then be used for the fabrication of TFTs on arbitrary substrates including plastic. This work will form the basis for the second part of the project which will focus solely on the development of technologically relevant devices including: memristors and novel quantum devices by manipulating at will the nature of the 2DEG formed within these simple to manufacture oxide SL based devices. Evaluation of the technology reliability/manufacturability and potential for scale-up will be performed in collaboration with the Holst Centre during the agreed secondment periods.

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