TEST-IC

Project "TEST-IC" data sheet

The following table provides information about the project.

 Partnership

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Map

 Project objective

The project is in the semiconductor testing software field. In the semiconductors testing process, nowadays most of the test programs are implemented manually combining vector sequences generated by automated tools (ATPG, automated test pattern generator). This implementation embeds the possibility of human errors, which can cause yield loss (“over-testing”), or quality (test escape, “under-testing”) problems. In our innovation: - the requirement and test specification, the test program implementation and verification are based on formal modeling. - Ad-hoc traceability algorithms have been identified and experimented. - Advanced data analysis techniques are applied - Correlation techniques are implemented to forecast device reliability. Europe has a strong share in the semiconductor market (STMicroelectronics, Infineon and NXP, already customers of ours). One of the more important global challenge is the development of new testing technologies and approach that lives up to the growing rate and complexities of the semiconductor industry. The industrial user needs addressed by our innovation are:. - Reduction of test escapes - Reduction of the development effort of test programs - Controlled and documented test development process.

Technical/industrial feasibility objectives - Study for the adaptation of the SME’s existing industrial capability to the production of the final product and processes optimization, gap analysis and costs quantification - Due diligence on regulatory requirements - Plan for intellectual Property (IP) management.

Economic Feasibility objectives: - Market study and definition of the marketing approach, - Economic risk assessment. - Analysis of the economic feasibility - Quantification of the capital and investments required - Development of a financial program - Detection of bottlenecks in the ability to increase profitability of the enterprise through innovation.

We intend to participate also at the SME phase 2 .