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Report

Teaser, summary, work performed and final results

Periodic Reporting for period 1 - RESCUE (Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems Design)

Teaser

Summary

RESCUE ITN advances scientific competences and establishes an innovative training for Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems Design.
Today, nanoelectronic systems are at the core of all industry sectors and deployed in life-critical application domains, such as healthcare, transportation, automotive and security, serving societal needs in Europe. They are being combined into Internet-of-Things and Cyber-Physical Systems and, ultimately, represent the physical backbone of our increasingly digitised world. Here, the impact and consequences of in-field failures, security attacks or hardware defects can be catastrophic. At the same time, they are getting very hard to avoid due to the trends of extreme complexity and miniaturisation at the doorstep of physical limits.
The objective is, first, to address the demanding and mutually dependent aspects of nanoelectronic systems design, i.e. reliability, security and quality, as well as corresponding electronic design automation tools. This will rescue and enhance design of complex systems at the next generation nanoelectronics technologies. Second, it is to provide early-stage researchers with innovative training in the involved disciplines and beyond, such that they will not only be able to face today and future challenges in nanoelectronics design but also be innovative, creative, and more importantly - have an entrepreneurial mentality. The latter will help to compile ideas into products and services for EU economic and social benefits.
RESCUE addresses boosting Europeâ€™s capabilities and leadership in nanoelectronics design and creation of qualified workforce and knowledge for industry. The consortium consists of leading European research groups competent to tackle the interdependent challenges in a holistic manner and to train new top-notch interdisciplinary professionals. The ITN is excellently balanced in terms of academic and industrial training and research facilities.

Work performed

In the first two years of the RESCUE project, the work was implemented according to the plan. First, the management and communication infrastructures as well as the recruitment strategy were established. All 15 early-stage researchers were recruited and started with their cross-sectoral interdisciplinary training through research activities. The project has organized a successful kick-off dissemination workshop, two internal 5-day winter workshops for technical and soft skills training and one open international summer school. 24 deliverables were produced and 6 milestones achieved. These include technical deliverables for the fellowsâ€™ research results in their individual research projects. The fellows have also benefited from the first secondments, identified the research requirements and published first scientific papers.

Final results

RESCUE targets at the progress beyond the state of the art in the following directions.
First, it is reliability of nanoelectronic systems that is subject to threats during the systemâ€™s lifetime in the field such as wear-out or ageing defects and errors coming from the environment, e.g. radiation caused soft errors. RESCUE fellows are aiming at the following. a) Appropriate reliability and fault models both for memory and logic will include intensive analysis, modelling and characterisation of different failure mechanisms such as Negative Bias Temperature Instability. b) Mitigation schemes and design-for reliability solutions at all levels including gate, circuit and system level including multi-core systems. In addition, on-line reliability flaws detection will be proposed and used to dynamically realised nanoelectronic system recovery and maintain reliable operations. c) Reliability models for EDA tools will include accurate lifetime and failure rate prediction models that can be integrated into EDA tools.
Second, it is quality of nanoelectronic systems that can be compromised by threats at time zero of the systemâ€™s life. These include design errors, manufacturing defects, nanometer technology process variation, etc. and are addressed by means of pre- and post-silicon functional validation, test and diagnosis. The following main aspects are addressed. a) Novel functional fault models and on-line test methods for nanoelectronic systems are under development to address the strict requirements of lifetime testing of electronic systems posed to the industry. In particular, the stress is on concurrent on-line test solutions, which in addition to targeting manufacturing defects at time zero will also cover temporary defects caused by environment and permanent defects caused by wear-out of the nanoelectronic system. b) RESCUE fellows are developing novel error management schemes at the system level, which will allow setting seamless trade-offs between the targets of reliability and performance. As a result, the longevity of nanoelectronic systems will be improved. c) Last but not least, they are targeting at localisation for multiple errors as well as scalable, compact and readable error correction that are currently missing in the state-of-the-art.
Third, it is security of nanoelectronic systems that can be compromised by attacks on design IP (intellectual property), data asset and design functionality. The key actions here are secure design of hardware and embedded software parts and accurate security evaluation. In particular, RESCUE ESRs are targeting the following topics. a) Physical Unclonable Functions (PUFs) in Nano era, in FinFET and FD-SOI. With PUFs the random uncontrollable manufacturing parameters of the device can be used to create a unique identifier and a cryptographic key root. PUF designs reliability and entropy performance will be validated for emerging technologies and under environmental, physical and system parameters. b) Intelligent system-level security aims at advanced fault injection attack detection concepts (i.e. machine learning based) without increasing utilization of hardware resources. c) Tamper-resistant implementations will prevent manipulation of cryptographic devices by fault-injection attacks (e.g. laser-based) adapting diversity in cipher algorithms implementations such as using different types of gates.
Fourth, it is EDA tools and methodologies for secure, correct and reliable nanoelectronics attained a holistic approach. Here, the ESRs are targeting at the following. a) Efficient fault-injection techniques which will reduce time for the analysis of fault injection simulations by excluding irrelevant faults and fault injection at mixed representation levels like Virtual Prototypes, RTL or gate-level netlists allow verification of the projects in different execution stages. b) Proposal of a CPU for automotive environment with added safety mechanisms, which is based on an open-source CPU,