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CRAM

Crosstalk Analysis for Microchips – a New Market Need

Total Cost €

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EC-Contrib. €

0

Partnership

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 CRAM project word cloud

Explore the words cloud of the CRAM project. It provides you a very rough idea of what is the project "CRAM" about.

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Project "CRAM" data sheet

The following table provides information about the project.

Coordinator
HELIC RESEARCH (IRELAND) LIMITED 

Organization address
address: 7 THE COURTYARD CARMANHALL ROAD
city: SANDYFORD DUBLIN
postcode: D18 NW62
website: n.a.

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Ireland [IE]
 Project website http://www.helic.com/eur/products/pharos/
 Total cost 71˙429 €
 EC max contribution 50˙000 € (70%)
 Programme 1. H2020-EU.3. (PRIORITY 'Societal challenges)
2. H2020-EU.2.3. (INDUSTRIAL LEADERSHIP - Innovation In SMEs)
3. H2020-EU.2.1. (INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies)
 Code Call H2020-SMEInst-2018-2020-1
 Funding Scheme SME-1
 Starting year 2018
 Duration (year-month-day) from 2018-06-01   to  2018-11-30

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    HELIC RESEARCH (IRELAND) LIMITED IE (SANDYFORD DUBLIN) coordinator 50˙000.00

Map

 Project objective

Helic produces Electronic Design Automation (EDA) tools, and specifically Electromagnetic Modelling (EM) software for Integrated Circuit (IC) Design. The tools are used to produce realistic models of ICs, to simulate operation under realistic conditions, thus generating savings both by reducing the number of IC prototyping and measurement cycles, as well as by significantly shortening Time to Market. The Company aims to become a world leader in a literally new market segment opening up in the EDA sector for Automated Crosstalk Analysis. The market is driven by high-value and high-growth applications in the 5G Networks, Cloud, IoT and Automotive sectors. Recent System on Chip design trends with requirements for high levels of chip density and integration, high RF frequency, Gbps bit rates and low power consumption, are establishing Crosstalk noise both as a major design constraint as well as a horrifying uncertainty for delayed Time to Market and subsequent revenue generation. Helic is in a unique position to create a game-changing Automated Crosstalk Analysis tool, which will (a) allow IC designers to abandon expensive and limiting risk-averse design practices and (b) eliminate the risk of missing the Market window of opportunity due to extended IC prototyping-debugging cycles, with potential financial penalty of up to $0.5bn for an advanced SoC. Although Helic tools contain all the necessary underlying, patented technology to tackle the problem of Crosstalk Analysis, significant product development effort is required to deliver a new Automated Crosstalk Analysis tool. The proposed feasibility study will address both the required product development effort and associated risk, as well as end-user functional requirements and market needs via an extended market survey with existing and prospect customers. The project will deliver a business plan including fully resourced product development roadmap, operational capacity and financial planning and risk assessment.

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The information about "CRAM" are provided by the European Opendata Portal: CORDIS opendata.

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