#	Pagina
attuale pagina	/open-h2020/projects/221185/results.html

Report

Teaser, summary, work performed and final results

Periodic Reporting for period 1 - EPI SGA1 (SGA1 (Specific Grant Agreement 1) OF THE EUROPEAN PROCESSOR INITIATIVE (EPI))

Teaser

Summary

The European Processor Initiative (EPI) is a project currently implemented under the first stage of the Framework Partnership Agreement (FPA: 800928), whose aim is to design and implement a roadmap for a new family of low-power European processors for extreme scale computing, high-performance Big-Data and a range of emerging applications. The first stage is the Special Grant Agreement of the European Processor Initiative (EPI-SGA1: 826647), which started in December 2018, aims to deliver a high-performance, low-power processor, implementing vector instructions and specific accelerators with high bandwidth memory access. The EPI processor will also meet high security and safety requirements. This will be achieved through intensive use of simulation, development of a complete software stack and tape-out in the most advanced semiconductor process node. SGA1 will provide a competitive chip that can effectively address the requirements of the HPC, AI, automotive and trusted IT infrastructure markets.

The EPI project is established as one of the cornerstones of this strategic plan â€“ it gathers 26 partners from 10 European countries to develop the processor and ensure that the key competence of high-end chip design remains in Europe. European scientists and industry will be able to access exceptional levels of energy-efficient computing performance. Exascale systems will need to simultaneously meet challenges related to performance, system cost and energy-efficiency. SGA1 will use a holistic approach to refine the system architecture and its component specifications.

To fulfill its objectives of working towards a hybrid Exascale system, SGA1 will develop:
- A novel, Exascale HPC-focused low-power processing system units (General Purpose Processor stream),
- An accelerator to increase energy efficiency for computing intensive tasks in HPC and AI (Accelerator stream),
- An automotive demonstration platform to test the relevance of the previous components in an automotive context paving the way for SGA2 (Automotive stream).
SGA1 intends to share a strong set of common technology between these three different development streams. It will start with a co-design approach using a holistic strategy to match the application needs and the technical solutions implemented. It will define the global architecture (hardware and software). A common design methodology will be established and a silicon process selected. Security is an essential topic and guidelines will be defined for all EPI products. A common and holistic approach for power management will be devised. Starting from the selection of cutting-edge processor technology, a low-power design approach will be centered in the HW around massive parallelism, specialised architecture, low-voltage operating point and fine grain power management. The SW stack will be designed to integrate and take advantage of these features to achieve high-energy efficiency and maximise performance across a wide range of layers from the low level firmware, all the way up to system software and application run-times.

Work performed

This document describes the progress made in EPI SGA1- 826647 during the first six months of the project, from 1st of December 2018 to 31st of May 2019. Various challenges have been faced during this period which are being successfully solved.
Collaboration between the partners within each stream and between the different streams has been established. Project management resources are in place a detailed project plan, agreed between the 26 members, is on the point of completion. This plan covers SW, HW, IPs, applications, test applications and co-design, as well as a description of the critical paths. A first draft of the â€œbudget-spent and forecastedâ€ document has also been generated.
Awareness of the project has increased globally, and the EPI brand has been promoted through keynotes at conferences in EU, USA, Japan, Singapore and China. A drastic change in tone of public declarations coming from EPI competitors reflects the fact that the project has become a reference in the sector.
Design of IPâ€™s and of the chip at system level started with some delays. In the first six months of the project the applications to be used for co-design has been defined and initial co-design questions have been tackled. The high-level design of the global architecture platform has been completed, and this will be used to physically integrate the processor IPs coming from the general purpose processor, the accelerator and the automotive streams (Stream1).
Work has been done to implement the first EPI processor by defining the high level specification, the integration and verification, IP design, preparing the implementation environment and providing early floorplan; additionally, work has been done on software, security and system definition (Stream2).
Additionally, EPI has delivered a high-level architecture for the EPI accelerator tile. It has also ramped up the implementation of the different IP blocks defined in the architecture and a basic compiler infrastructure has also been developed (Stream3).
In this reporting period the focus of the automotive group has been on determining requirements and specifications. The functional and non-functional requirements for the automotive eHPC platform have been derived and the according HW/SW feature-set and performance specification have been performed. This work will be finished developing the implementation roadmap. Work has also been done on the architectural conception, required analyses, and the automotive eHPC platform system architecture definition (Stream4).

Final results

The design of a novel HPC processor family cannot be sustainable without thinking about possible additional markets that could support such long-term activities. Thus, EPI will cover other areas such as the automotive sector, ensuring the overall economic viability of the initiative. EPI covers the complete range of expertise, skills and competencies needed to design and execute a sustainable roadmap for research and innovation in processor and computing technology fostering future exascale HPC and emerging applications, including Big Data, and automotive computing for autonomous vehicles. Development of a new processor to be at the core of future computing systems will be divided into 4 streams:Common Platform and global architecture stream, HPC general purpose processor stream, Accelerator stream and Automotive platform stream.