#	Pagina
attuale pagina	/open-h2020/projects/197934/results.html
-1	/open-h2020/projects/223467/index.html
-2	/open-h2020/projects/195835/index.html
-3	/open-h2020/projects/196049/index.html

Report

Teaser, summary, work performed and final results

Periodic Reporting for period 2 - ExaNeSt (European Exascale System Interconnect and Storage)

Teaser

Summary

\"Today, the whole world is trying to push supercomputer technology to the \"\"exa-scale\"\" level: one billion billion (10**18) operations per second.
Supercomputing, officially called High Performance Computing (HPC), is today a key tool for almost all sectors of science, engineering, bio-medicine, finance, and more, enabling researchers and designers to go well beyond what was achievable in the past.
Many problems have to be overcome for HPC to reach exa-scale, and the European Union\'s Horizon-2020 FET-HPC Programme is funding a number of projects in order to advance Europe\'s capabilities in these fronts.

Energy consumption is the most central of these problems --electricity costs, environmental footprint, as well as removing the heat that results from the consumption of electricity.
To reduce energy per compute operation, many of these projects in Europe turn to ARM processors: most cellular phones today use such processors, because of their low energy consumption, but turning mobile solutions to HPC technology still needs work.
The second important tool for reducing energy consumption is to use specialized hardware circuits for accelerating specific parts of computation that are amenable to execution on such hardware.
One promising style is to use Reconfigurable hardware (Field-Programmable Gate Arrays - FPGA), which can be adapted to various algorithms in order to accelerate them.

ExaNeSt, one of these FET-HPC projects, has adopted the ARM and the FPGA platform, and has been working on three specific of the above problems, within this ARM + FPGA context:
(i) the Interconnection Network that joins together the tens of thousands of processors so that they communicate and co-operate with each other;
(ii) the Storage that provides persistent files as inputs and outputs of the computation, quickly enough; and
(iii) the dense Packaging technology needed for fitting a whole exa-scale machine within a reasonable building space and the Cooling technology needed for removing the extreme amounts of heat being generated.
\"

Work performed

\"We are proud not only for having developed new solutions for these problems, but also for having tested them on a real hardware Prototype that runs entire, real HPC Application Programs.
The compute nodes of this Testbed are interconnected in a 3-dimensional torus topology, and software can communicate across nodes within less than 1 micro-second, bypassing several layers of overhead, hence unneeded energy consumption, like operating system calls and copying data multiple times from one memory buffer to another.
For storage, we have extended the BeeGFS popular open parallel file system, and we provide on-demand temporary storage locally, as opposed to the traditional central organization: distributed local storage reduces communication overheads and energy, and avoids the bottlenecks of centralized storage.
Our prototype packs compute nodes very close to each other and very close to main memory (DRAM) and persistent storage (SSD), thus reducing communication time and energy; then, to cool these very densely packaged nodes, we immerse them into a fluid that conducts heat but not electricity, using novel techniques.

We have ported real, full Applications from materials science, climate forecasting, computational fluid dynamics, astrophysics, neuroscience, and a database to this ARM plus FPGA platform, we have optimized them for this new environment, and we have evaluated them.

Our results have shown that the energy consumed for solving a given problem on this new ExaNeSt platform is 3 to 10 times lower, hence better, than for solving the same problem on traditional HPC processors of the same time frame (2016). For Applications with compute-intensive kernels, such as the N-Body problem, we used Reconfigurable Hardware (FPGA) Accelerators, in which case we achieved 2 times better (faster) time-to-solution relative to competitive traditional HPC processors of the same time frame, or 6 times better (faster) time-to-solution relative to a popular gaming GPU. Even more pronounced are our gains, in this case, in terms of energy-delay product (EDP - a metric that looks at both economizing on energy and reaching the solution fast): our FPGA Accelerator is two-and-a-half orders of magnitude better than competitive traditional HPC processors, or one order of magnitude better than a popular gaming GPU, or two times better than the most powerful current GPU, in terms of EDP, in this case.

The experience and these new technologies from ExaNeSt, together with complementary ones from the \"\"sister\"\" projects ExaNoDe and EcoScale, are now being used in the follow-on projects EuroEXA and EPI (European Processor Initiative), contributing to the EuroHPC JU strategy; they have been extensively published in Conference, Workshops, Trade shows, and Patents; and some of them form the basis for new commercial products of the industrial partners.\"

Final results

The ExaNeSt project worked for solving the central problem of future computing: reduce the energy spent for a given computation; it has thus contributed towards European leadership in the broad high performance computing and big data sectors from hardware and technology to entire systems and the HPC applications around them.

The ExaNeSt Interconnect technology minimizes the number of data copies while communicating, thus reducing energy and delays, and achieves this using circuits quite less costly than other methods. The unified interconnect for both storage and data communication that we are promoting is in striking contrast with current supercomputers, which may use three or four different networks to cover the same needs at a corresponding high cost, energy consumption, and cabling complexity. Our scalable unified storage allows moving tasks and processes close to data, which is likely to revolutionize the area, answering the data-induced bottlenecks that future supercomputers are expected to face. Our virtualization approach is applied to supercomputers for the first time. We provide a high density total liquid cooling technology that enables the capture of heat into liquids where it can be reused. Our energy-efficient solutions are expected to spread to standard off-the-shelf computing systems, assisting the efforts of the EU to reduce carbon dioxide emissions and reach environmental targets.

ExaNeSt contributed to a new generation of European Supercomputers, thus creating new business opportunities. Our envisioned advances in performance and efficiency will enable small-to-medium sized companies in several sectors of the economy to utilize HPC and data analytics, with an attractive trade-off between usability and affordability, thus improving their competitiveness. The capability to analyse large data sets within realistic cost and power budgets enables integration of new knowledge from diverse high-volume sources (see Smart Cities).

ExaNeSt has also educated numerous young engineers, thus contributing to close the large skills gap in academia and industry that hinders the development of European Supercomputing and Business Analytics technologies.