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TEST-IC

Integrated Cicuit Testing Software

Total Cost €

EC-Contrib. €

Partnership

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Outcomes and
results

TEST-IC project word cloud

Explore the words cloud of the TEST-IC project. It provides you a very rough idea of what is the project "TEST-IC" about.

device final ad infineon economic lives atpg quantification traceability automated risk definition yield enterprise specification intend customers embeds tools marketing capital correlation global financial forecast diligence quality profitability manually software sme formal documented possibility modeling investments industry programs escapes complexities requirement algorithms ours innovation regulatory reliability participate verification combining human nxp data vector rate feasibility techniques capability stmicroelectronics pattern intellectual nowadays escape hoc sequences errors plan industrial technologies property ip effort generator share experimented gap optimization market detection bottlenecks semiconductors semiconductor

Project "TEST-IC" data sheet

The following table provides information about the project.

Coordinator	NPLUST SEMICONDUCTOR APPLICATION CENTER SRL Organization address address: LOCALITA CASTELFRANCO 132 city: MONTECASTRILLI postcode: 5026 website: n.a. contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.
Coordinator Country	Italy [IT]
Project website	http://www.n-plus-t.com
Total cost	71˙429 €
EC max contribution	50˙000 € (70%)
Programme	1. H2020-EU.2.1.1. (INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT)) 2. H2020-EU.2.3.1. (Mainstreaming SME support, especially through a dedicated instrument)
Code Call	H2020-SMEINST-1-2015
Funding Scheme	SME-1
Starting year	2015
Duration (year-month-day)	from 2015-07-01 to 2015-12-31

Partnership

Take a look of project's partnership.

#	participants	country	role	EC contrib. [€]
1	NPLUST SEMICONDUCTOR APPLICATION CENTER SRL NPLUST SEMICONDUCTOR APPLICATION CENTER SRL Organization address address: LOCALITA CASTELFRANCO 132 city: MONTECASTRILLI postcode: 5026 website: n.a. contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	IT (MONTECASTRILLI)	coordinator	50˙000.00

Map

Project objective

The project is in the semiconductor testing software field. In the semiconductors testing process, nowadays most of the test programs are implemented manually combining vector sequences generated by automated tools (ATPG, automated test pattern generator). This implementation embeds the possibility of human errors, which can cause yield loss (“over-testing”), or quality (test escape, “under-testing”) problems. In our innovation: - the requirement and test specification, the test program implementation and verification are based on formal modeling. - Ad-hoc traceability algorithms have been identified and experimented. - Advanced data analysis techniques are applied - Correlation techniques are implemented to forecast device reliability. Europe has a strong share in the semiconductor market (STMicroelectronics, Infineon and NXP, already customers of ours). One of the more important global challenge is the development of new testing technologies and approach that lives up to the growing rate and complexities of the semiconductor industry. The industrial user needs addressed by our innovation are:. - Reduction of test escapes - Reduction of the development effort of test programs - Controlled and documented test development process.

Technical/industrial feasibility objectives - Study for the adaptation of the SME’s existing industrial capability to the production of the final product and processes optimization, gap analysis and costs quantification - Due diligence on regulatory requirements - Plan for intellectual Property (IP) management.

Economic Feasibility objectives: - Market study and definition of the marketing approach, - Economic risk assessment. - Analysis of the economic feasibility - Quantification of the capital and investments required - Development of a financial program - Detection of bottlenecks in the ability to increase profitability of the enterprise through innovation.

We intend to participate also at the SME phase 2 .

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The information about "TEST-IC" are provided by the European Opendata Portal: CORDIS opendata.