INSIGHT
Integration of III-V Nanowire Semiconductors for next Generation High Performance CMOS SOC Technologies
Total Cost €
0EC-Contrib. €
0Partnership
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Project "INSIGHT" data sheet
The following table provides information about the project.
| Coordinator |
LUNDS UNIVERSITET
Organization address contact info |
| Coordinator Country | Sweden [SE] |
| Project website | http://www.insight-h2020.eu/ |
| Total cost | 4˙244˙996 € |
| EC max contribution | 3˙524˙433 € (83%) |
| Programme |
1. H2020-EU.2.1.1. (INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT)) |
| Code Call | H2020-ICT-2015 |
| Funding Scheme | RIA |
| Starting year | 2015 |
| Duration (year-month-day) | from 2015-12-01 to 2019-05-31 |
Partnership
Take a look of project's partnership.
| # | ||||
|---|---|---|---|---|
| 1 | LUNDS UNIVERSITET | SE (LUND) | coordinator | 1˙206˙548.00 |
| 2 | FRAUNHOFER GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V. | DE (MUNCHEN) | participant | 634˙723.00 |
| 3 | COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES | FR (PARIS 15) | participant | 622˙763.00 |
| 4 | UNIVERSITY OF GLASGOW | UK (GLASGOW) | participant | 542˙155.00 |
| 5 | UNIVERSITY COLLEGE CORK - NATIONAL UNIVERSITY OF IRELAND, CORK | IE (Cork) | participant | 518˙242.00 |
| 6 | IBM RESEARCH GMBH | CH (RUESCHLIKON) | participant | 0.00 |
Map
Project objective
Overall objective: to enhance advanced CMOS RF and logic capability through the use of III-V heterostructure nanowires monolithically integrated on a silicon platform.
INSIGHT will focus on: -Development and evaluation of the performance of silicon based, 94 GHz III-V nanowire MOSFET low-noise amplifiers. The technology opens a path for cost reduction of key mm-wave components for high bandwidth wireless applications. -Development of III-V nanowire MOSFETs on Si with breakdown voltage of 6 V, and evaluation of their performance in millimeter wave (90 GHz) power amplifier circuits. These devices will increase output power available from Si CMOS compatible mm-wave technologies with benefits for transceiver range and sensitivity. -Realisation of basic building blocks for future RF-circuits including mixers, Voltage-Controlled Oscillators, and frequency dividers for prescalers using silicon based III-V nanowire MOSFETS. -Development of science and technology for all-III-V nanowire CMOS on silicon targeting future technology nodes for 10 nm and below. This will be validated by the implementation and dynamic characterisation of a flip-flop as demonstration of the co-integration of III-V n- and p-type nanowire MOSFETs.
INSIGHT is a strong consortium consisting of 7 partners with complimentary and well-documented experience in III-V MOS technology and millimeter-wave circuit design and implementation. Our main outcomes include : a)Technology toolbox including, materials, processes and integration for III-V n- and p-channel MOSFETs on a silicon platform, b) III-V nanowire MOSFET RF-transistor technology, c) Circuit design library, d) Circuit demonstrators with a clear technology path towards higher TRLs and commercialization. Our vision is to use III-V nanowire CMOS technology for millimeter-wave applications in a System-on-Chip approach, combining RF- and logic on one Si chip. Additionally, applications for logic at the 10 nm node and beyond are foreseen.
Deliverables
| Final report on RF-transistors | Documents, reports | 2020-03-25 14:33:15 |
| Circuit-level Benchmarking Report | Documents, reports | 2020-03-25 14:33:15 |
| Second update on Dissemination Plan | Documents, reports | 2020-03-25 14:33:14 |
| First noise measurements and RF noise model | Documents, reports | 2020-03-25 14:33:14 |
| Report on high voltage (3-6V) gate stack development | Documents, reports | 2020-03-25 14:33:14 |
| Web site launch and Press Release for the INSIGHT project | Documents, reports | 2020-03-25 14:33:14 |
| Improved noise measurements and RF noise model. p-type noise | Documents, reports | 2020-03-25 14:33:14 |
| Correlation between CV, 1/f, Hysteresis gm(w) on the border trap density | Documents, reports | 2020-03-25 14:33:14 |
| PA and LNA data sheet | Documents, reports | 2020-03-25 14:33:14 |
| External Communication Plan | Documents, reports | 2020-03-25 14:33:14 |
| Data from first small signal model obtained from existing nanowire technology | Documents, reports | 2020-03-25 14:33:14 |
Take a look to the deliverables list in detail: detailed list of INSIGHT deliverables.
Publications
| year | authors and title | journal | last update |
|---|---|---|---|
| 2016 |
V. Deshpande, V. Djara, T. Morf, P. Hashemi, E. O’Connor, K. Balakrishnan, D. Caimi, M. Sousa,
L. Czornomaz and J. Fompeyrine InGaAs-on-Si (Ge) 3D Monolithic Technology for CMOS and More-than-Moore published pages: , ISSN: , DOI: |
Int\'l Conf. on Solid State Devices and Materials (SSDM), Book of Extended Abstracts in 2 | 2020-03-25 |
| 2019 |
Clarissa Convertino, Cezar B. Zota, Daniele Caimi, Marilyne Sousa, Kirsten E. Moselund, Lukas Czornomaz High-performance InGaAs FinFETs with raised source/drain extensions published pages: 80901, ISSN: 0021-4922, DOI: |
Japanese Journal of Applied Physics 58/8 | 2020-03-25 |
| 2017 |
Olli-Pekka Kilpi, Johannes Svensson, Jun Wu, Axel R. Persson, Reine Wallenberg, Erik Lind, Lars-Erik Wernersson Vertical InAs/InGaAs Heterostructure Metal–Oxide–Semiconductor Field-Effect Transistors on Si published pages: 6006-6010, ISSN: 1530-6984, DOI: 10.1021/acs.nanolett.7b02251 |
Nano Letters 17/10 | 2020-03-25 |
| 2019 |
Mattias Borg, Lynne Gignac, John Bruley, Andreas Malmgren, Saurabh Sant, Clarissa Convertino, Marta D Rossell, Marilyne Sousa, Chris Breslin, Heike Riel, Kirsten E Moselund, Heinz Schmid Facet-selective group-III incorporation in InGaAs template assisted selective epitaxy published pages: 84004, ISSN: 0957-4484, DOI: 10.1088/1361-6528/aaf547 |
Nanotechnology 30/8 | 2020-03-25 |
| 2016 |
Erik Lind High frequency III–V nanowire MOSFETs published pages: 93005, ISSN: 0268-1242, DOI: 10.1088/0268-1242/31/9/093005 |
Semiconductor Science and Technology 31/9 | 2020-03-25 |
| 2017 |
Markus Hellenbrand, Elvedin Memisevic, Martin Berg, Olli-Pekka Kilpi, Johannes Svensson, Lars-Erik Wernersson Low-Frequency Noise in III–V Nanowire TFETs and MOSFETs published pages: 1520-1523, ISSN: 0741-3106, DOI: 10.1109/led.2017.2757538 |
IEEE Electron Device Letters 38/11 | 2020-03-25 |
| 2019 |
Olli-Pekka Kilpi, Johannes Svensson, Erik Lind, Lars-Erik Wernersson Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs published pages: 70-75, ISSN: 2168-6734, DOI: 10.1109/jeds.2018.2878659 |
IEEE Journal of the Electron Devices Society 7 | 2020-03-25 |
| 2017 |
Jun Lin, Scott Monaghan, Karim Cherkaoui, Ian M. Povey, Brendan Sheehan, Paul K. Hurley Examining the relationship between capacitance-voltage hysteresis and accumulation frequency dispersion in InGaAs metal-oxide-semiconductor structures based on the response to post-metal annealing published pages: 204-208, ISSN: 0167-9317, DOI: 10.1016/j.mee.2017.05.020 |
Microelectronic Engineering 178 | 2020-03-25 |
| 2019 |
Markus Hellenbrand, Olli-Pekka Kilpi, Johannes Svensson, Erik Lind, Lars-Erik Wernersson Low-frequency noise in nanowire and planar III-V MOSFETs published pages: 110986, ISSN: 0167-9317, DOI: 10.1016/j.mee.2019.110986 |
Microelectronic Engineering | 2020-03-25 |
| 2018 |
Adam Jonsson, Johannes Svensson, Lars-Erik Wernersson A Self-Aligned Gate-Last Process Applied to All-III–V CMOS on Si published pages: 935-938, ISSN: 0741-3106, DOI: 10.1109/led.2018.2837676 |
IEEE Electron Device Letters 39/7 | 2020-03-25 |
| 2018 |
Philippe Ferrandis, Mathilde Billaud, Julien Duvernay, Mickael Martin, Alexandre Arnoult, Helen Grampeix, Mikael Cassé, Hervé Boutry, Thierry Baron, Maud Vinet, Gilles Reimbold Electrical properties of metal/Al 2 O 3 /In 0.53 Ga 0.47 As capacitors grown on InP published pages: 161534, ISSN: 0021-8979, DOI: 10.1063/1.5007920 |
Journal of Applied Physics 123/16 | 2020-03-25 |
| 2019 |
Clarissa Convertino, Cezar Zota, Heinz Schmid, Daniele Caimi, Marilyne Sousa, Kirsten Moselund, Lukas Czornomaz InGaAs FinFETs Directly Integrated on Silicon by Selective Growth in Oxide Cavities published pages: 87, ISSN: 1996-1944, DOI: 10.3390/ma12010087 |
Materials 12/1 | 2020-03-25 |
| 2017 |
V. Deshpande, V. Djara, E. O\'Connor, P. Hashemi, T. Morf, K. Balakrishnan, D. Caimi, M. Sousa, J. Fompeyrine, L. Czornomaz Three-dimensional monolithic integration of III-V and Si(Ge) FETs for hybrid CMOS and beyond published pages: 04CA05, ISSN: 1347-4065, DOI: 10.7567/JJAP.56.04CA05 |
Japanese Journal of Applied Physics vol 56 | 2020-03-25 |
| 2017 |
Aein S. Babadi, Johannes Svensson, Erik Lind, Lars-Erik Wernersson Impact of doping and diameter on the electrical properties of GaSb nanowires published pages: 53502, ISSN: 0003-6951, DOI: 10.1063/1.4975374 |
Applied Physics Letters 110/5 | 2020-03-25 |
| 2016 |
Martin Berg, Olli-Pekka Kilpi, Karl-Magnus Persson, Johannes Svensson, Markus Hellenbrand, Erik Lind, Lars-Erik Wernersson Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si published pages: 1-1, ISSN: 0741-3106, DOI: 10.1109/LED.2016.2581918 |
IEEE Electron Device Letters Volume:PP Issue: 99Â | 2020-03-25 |
| 2019 |
Axel Tessmann, Arnulf Leuther, Felix Heinz, Frank Bernhardt, Laurenz John, Hermann Massler, Lukas Czornomaz, Thomas Merkle 20-nm In0.8Ga0.2As MOSHEMT MMIC Technology on Silicon published pages: 1-8, ISSN: 0018-9200, DOI: 10.1109/jssc.2019.2915161 |
IEEE Journal of Solid-State Circuits | 2020-03-25 |
| 2017 |
Mattias Borg, Heinz Schmid, Johannes Gooth, Marta D. Rossell, Davide Cutaia, Moritz Knoedler, Nicolas Bologna, Stephan Wirths, Kirsten E. Moselund, Heike Riel High-Mobility GaSb Nanostructures Cointegrated with InAs on Si published pages: 2554-2560, ISSN: 1936-0851, DOI: 10.1021/acsnano.6b04541 |
ACS Nano 11/3 | 2020-03-25 |
| 2016 |
Cezar Zota, Fredrik Lindelöw, Lars-Erik Wernersson, Erik Lind High-Frequency InGaAs Tri-gate MOSFETs with fmax of 400 GHz published pages: , ISSN: 0013-5194, DOI: 10.1049/el.2016.3108 |
Electronics Letters | 2020-03-25 |
| 2016 |
Millar, D., Peralagu, U., Fu, Y.-C., Li, X., Steer, M., and Thayne, I. Initial investigation on the impact of in situ hydrogen plasma exposure to the interface between molecular beam epitaxially grown p-Ga0.7In0.3Sb (100) and thermal atomic layer deposited (ALD) Al2O3 published pages: N/A, ISSN: , DOI: |
WoDIM Yearly; Session 4: III-V FETs | 2020-03-25 |
| 2017 |
Davide Cutaia, K. Moselund, H. Schmid, M. Borg, H. Riel Uniting III-V Tunnel FETs with Silicon published pages: 38-42, ISSN: 2042-7328, DOI: |
Compound Semiconductor 23 (1) | 2020-03-25 |
| 2017 |
É. O\'Connor, K. Cherkaoui, S. Monaghan, B. Sheehan, I. M. Povey, P. K. Hurley Inversion in the In 0.53 Ga 0.47 As metal-oxide-semiconductor system: Impact of the In 0.53 Ga 0.47 As doping concentration published pages: 32902, ISSN: 0003-6951, DOI: 10.1063/1.4973971 |
Applied Physics Letters 110/3 | 2020-03-25 |
| 2016 |
Cezar Zota, Lars-Erik Wernersson, Erik Lind High-Performance Lateral Nanowire InGaAs MOSFETs with Improved On-Current published pages: 1-1, ISSN: 0741-3106, DOI: 10.1109/LED.2016.2602841 |
IEEE Electron Device Letters | 2020-03-25 |
| 2019 |
Cezar B. Zota, Clarissa Convertino, Marilyne Sousa, Daniele Caimi, Kirsten Moselund, Lukas Czornomaz High-Frequency Quantum Well InGaAs-on-Si MOSFETs With Scaled Gate Lengths published pages: 538-541, ISSN: 0741-3106, DOI: 10.1109/led.2019.2902519 |
IEEE Electron Device Letters 40/4 | 2020-03-25 |
| 2017 |
Veeresh Deshpande, H. Hahn, E. O\'Connor, Y. Baumgartner, D. Caimi, M. Sousa, H. Boutry, J. Widiez, L. Brevard, C. Le Royer, M. Vinet, J. Fompeyrine, L. Czornomaz Demonstration of 3-D SRAM Cell by 3-D Monolithic Integration of InGaAs n-FinFETs on FDSOI CMOS With Interlayer Contacts published pages: 4503-4509, ISSN: 0018-9383, DOI: 10.1109/ted.2017.2755662 |
IEEE Transactions on Electron Devices 64/11 | 2020-03-25 |
| 2017 |
V. Deshpande, V. Djara, E. O\'Connor, P. Hashemi, K. Balakrishnan, D. Caimi, M. Sousa, L. Czornomaz, J. Fompeyrine DC and RF characterization of InGaAs replacement metal gate (RMG) nFETs on SiGe-OI FinFETs fabricated by 3D monolithic integration published pages: 87-91, ISSN: 0038-1101, DOI: 10.1016/j.sse.2016.10.034 |
Solid-State Electronics 128 | 2020-03-25 |
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