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SILICON

Self-Injection-Locked Integrated Analog-to-Digital Converter

Total Cost €

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EC-Contrib. €

0

Partnership

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 SILICON project word cloud

Explore the words cloud of the SILICON project. It provides you a very rough idea of what is the project "SILICON" about.

training    architecture    wireless    standpoint    amplitude    analog    oscillator    input    resonating    data    converters    inexpensive    highest    signal    forming    industry    compensate    reasonably    quantity    plls    ics    purpose    fundamental    accordingly    delayed    rf    physical    efficiency    injection    hardware    linear    edge    locking    personalised    world    scaling    soon    energy    oscillating    injected    career    versus    autonomous    predictable    sil    things    signaling    cutting    certain    academic    iot    topologies    giving    circuit    leaders    detector    techniques    made    overcome    mainstream    opamps    exchanging    internet    adc    hybrid    devise    technique    nonlinear    circuits    attempts    transceivers    attempting    self    mitigate    adcs    area    class    waveform    building    mode    blocks    vco    silicon    adding    plan    network    exploited    performance    time    filters    demand    thousands    shown    operation    integration    digital    frequency    mathematically    limitations    communication    small    relationship   

Project "SILICON" data sheet

The following table provides information about the project.

Coordinator
UNIVERSITY COLLEGE DUBLIN, NATIONAL UNIVERSITY OF IRELAND, DUBLIN 

Organization address
address: BELFIELD
city: DUBLIN
postcode: 4
website: www.ucd.ie

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Ireland [IE]
 Project website http://www.bogdanst.com/research.html
 Total cost 175˙866 €
 EC max contribution 175˙866 € (100%)
 Programme 1. H2020-EU.1.3.2. (Nurturing excellence by means of cross-border and cross-sector mobility)
 Code Call H2020-MSCA-IF-2016
 Funding Scheme MSCA-IF-EF-ST
 Starting year 2017
 Duration (year-month-day) from 2017-04-01   to  2019-03-31

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    UNIVERSITY COLLEGE DUBLIN, NATIONAL UNIVERSITY OF IRELAND, DUBLIN IE (DUBLIN) coordinator 175˙866.00

Map

 Project objective

The Internet-of-Things (IoT) will soon represent the main target application of ICs, involving thousands of autonomous devices forming a large communication network for the purpose of exchanging/processing information about the physical world. From a hardware standpoint, the RF wireless transceivers of IoT devices demand the highest possible energy efficiency and a small area to enable inexpensive large-scale integration. Since analog/RF building blocks must be integrated with the mainstream digital technology, new circuit topologies and techniques must be adopted. The time-mode signaling, recently exploited in all-digital PLLs, data converters (the so called time-mode or VCO-based ADCs), opamps and filters, allows the performance of “analog” circuits to improve with the technology scaling. The proposed research focuses on a novel architecture of time-mode ADC, attempting to mitigate the fundamental limitations of such class of converters (i.e. the highly nonlinear VCO) by exploiting advanced RF techniques, thus giving rise to a hybrid time/frequency-mode operation. Studies have shown that by injection-locking an oscillator to its own delayed resonating waveform (self-injection-locking, SIL), the oscillating frequency can be made reasonably linear versus only two well-controlled parameters (i.e. the amplitude and phase of the self-injected signal). The SIL technique will be exploited to achieve a known, predictable relationship between the oscillating frequency and a certain analog quantity (i.e. the input signal). Accordingly, the proposed research attempts to mathematically overcome, and not to compensate accordingly, the nonlinear characteristic of an oscillator. By adding a simple digital frequency detector, SILICON has potential to devise a new class of data converters, the SIL-ADCs. It will also provide the applicant with cutting edge training from academic & industry leaders in the field which will be implemented using a personalised career development plan.

 Publications

year authors and title journal last update
List of publications.
2018 Hongying Wang, Filippo Schembari, Marek Miskowicz, Robert Bogdan Staszewski
An Adaptive-Resolution Quasi-Level-Crossing-Sampling ADC Based on Residue Quantization in 28-nm CMOS
published pages: 178-181, ISSN: 2573-9603, DOI: 10.1109/lssc.2019.2899723
IEEE Solid-State Circuits Letters 1/8 2019-10-07
2019 Viet Nguyen, Filippo Schembari, Robert Bogdan Staszewski
A 0.2-V 30-MS/s 11b-ENOB Open-Loop VCO-Based ADC in 28-nm CMOS
published pages: 1-1, ISSN: 2573-9603, DOI: 10.1109/lssc.2019.2906777
IEEE Solid-State Circuits Letters 2019-10-07

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