MIRTHE
Monolithic InP-based Dual Polarization QPSK Integrated Receiver and Transmitter for CoHerent 100-400Gb Ethernet
| Coordinatore | III V LAB
Organization address
address: ROUTE DE NOZAY contact info |
| Nazionalità Coordinatore | France [FR] |
| Totale costo | 5˙001˙978 € |
| EC contributo | 3˙250˙000 € |
| Programma | FP7-ICT
Specific Programme "Cooperation": Information and communication technologies |
| Code Call | FP7-ICT-2009-5 |
| Funding Scheme | CP |
| Anno di inizio | 2010 |
| Periodo (anno-mese-giorno) | 2010-07-01 - 2013-10-31 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
III V LAB
Organization address
address: ROUTE DE NOZAY contact info |
FR (MARCOUSSIS) | coordinator | 0.00 |
| 2 |
ALCATEL - LUCENT BELL LABS FRANCE
Organization address
address: AVENUE OCTAVE GREARD 3 contact info |
FR (PARIS) | participant | 0.00 |
| 3 |
FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V
Organization address
address: Hansastrasse 27C contact info |
DE (MUNCHEN) | participant | 0.00 |
| 4 |
u2t Photonics AG
Organization address
address: REUCHLINSTRASSE 10-11 contact info |
DE (Berlin) | participant | 0.00 |
| 5 |
UNIVERSIDAD DE MALAGA
Organization address
address: CALLE EL EJIDO S/N contact info |
ES (MALAGA) | participant | 0.00 |
| 6 |
VPIPHOTONICS GMBH
Organization address
address: CARNOTSTRASSE 6 contact info |
DE (BERLIN) | participant | 0.00 |
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Obiettivo del progetto (Objective)
MIRTHE targets new multilevel-modulation all-monolithic integrated TX and RX Photonic Integrated Circuits (PICs) able to achieve 100-400 Gb/s aggregated speed on a single wavelength. This project is motivated by:- the reduction of cost and power consumption of 100Gb/s transmission equipment,- the need of future-proof component technologies for next generation terabit networks.Chips will be packaged and driven at 28 and then 56 GBauds to realize first PIC-to-PIC Terabit range transmissions.The innovation introduced by the monolithic integration of RX and TX with novel vector EAM-based sources should bring a real breakthrough in cost, size and consumption of Terabit components.The specific objectives are:- Demonstration and mastering of a monolithic integration technology of InP-based TX and RX chips suitable for handling 100Gb/s QPSK-type modulation formats,- Demonstration of a future-proof approach by enhancing the bit rate to 200 Gb/s and providing concepts up to 400 Gb/s on a single fiber and wavelength,- Module packaging of the TX and RX PICs with driving electronics,- Demonstration of PIC to PIC transmission at 100 and 200 Gb/s,- Simulations at the device and system levels to identify capabilities and limitations and to contribute to specifications.The innovations claimed are:- Small size TX chips suitable for multi-level coding (QPSK, QAM), based on phase switching in EAM-based PICs,- Fully integrated RX chips demultiplexing both polarizations of the incoming light signal (DP-QPSK),- Evaluation and prototype fabrication of novel monolithic coherent receiver types, applying multiport approaches,- Demonstration of low-power low-footprint multi-level coding TX and RX,- Coplanar coherent receiver package with gain-controlled linear electrical amplifiers.- Demonstration of 200 – 400 Gb/s capability of InP-based TX and RX PICs- Integrated approach for photonic circuit numerical modelling and design.