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ECOSCALE SIGNED

Energy-efficient Heterogeneous COmputing at exaSCALE

Total Cost €

EC-Contrib. €

Partnership

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Outcomes and
results

ECOSCALE project word cloud

Explore the words cloud of the ECOSCALE project. It provides you a very rough idea of what is the project "ECOSCALE" about.

compute servers mapping structure programming accesses co world architecture follows secondly accessed space exascale scaling memory runtime data proposing automated refine larger coherent delays utilizing energy run reconfigurable virtual first partitions limitations workers hierarchically perform solution partitioned consumption nodes employ efficient worker proof middleware onto hpc hierarchical hybrid layer model ecoscale prototype feasible interconnected multiple global traffic simulator utility resilience autonomous improvements heterogeneous apart accelerators power performance follow spans protocol hardware form reducing tree platform iommu efficiency scalable opencl tackles mpi environment pgas shared benchmarks significantly synthesis mpiopencl partition

Project "ECOSCALE" data sheet

The following table provides information about the project.

Coordinator	TELECOMMUNICATION SYSTEMS INSTITUTE Organization address address: Technical University of Crete Campus - Kounoupidiana city: CHANIA postcode: 73100 website: www.tsi.gr contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.
Coordinator Country	Greece [EL]
Project website	http://www.ecoscale.eu/
Total cost	4˙237˙397 €
EC max contribution	4˙237˙397 € (100%)
Programme	1. H2020-EU.1.2.2. (FET Proactive)
Code Call	H2020-FETHPC-2014
Funding Scheme	RIA
Starting year	2015
Duration (year-month-day)	from 2015-10-01 to 2019-07-31

Partnership

Take a look of project's partnership.

#	participants	country	role	EC contrib. [€]
1	TELECOMMUNICATION SYSTEMS INSTITUTE TELECOMMUNICATION SYSTEMS INSTITUTE Organization address address: Technical University of Crete Campus - Kounoupidiana city: CHANIA postcode: 73100 website: www.tsi.gr contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	EL (CHANIA)	coordinator	688˙625.00
2	THE QUEEN'S UNIVERSITY OF BELFAST THE QUEEN'S UNIVERSITY OF BELFAST Organization address address: UNIVERSITY ROAD LANYON BUILDING city: BELFAST postcode: BT7 1NN website: www.qub.ac.uk contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	UK (BELFAST)	participant	710˙000.00
3	CHALMERS TEKNISKA HOEGSKOLA AB CHALMERS TEKNISKA HOEGSKOLA AB Organization address address: - city: GOETEBORG postcode: 41296 website: www.chalmers.se contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	SE (GOETEBORG)	participant	570˙632.00
4	POLITECNICO DI TORINO POLITECNICO DI TORINO Organization address address: CORSO DUCA DEGLI ABRUZZI 24 city: TORINO postcode: 10129 website: www.polito.it contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	IT (TORINO)	participant	517˙500.00
5	THE UNIVERSITY OF MANCHESTER THE UNIVERSITY OF MANCHESTER Organization address address: OXFORD ROAD city: MANCHESTER postcode: M13 9PL website: www.manchester.ac.uk contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	UK (MANCHESTER)	participant	507˙865.00
6	SYNELIXIS LYSEIS PLIROFORIKIS AUTOMATISMOU & TILEPIKOINONION ANONIMI ETAIRIA SYNELIXIS LYSEIS PLIROFORIKIS AUTOMATISMOU & TILEPIKOINONION ANONIMI ETAIRIA Organization address address: FARMAKIDOU 10 city: CHALKIDA postcode: 34100 website: n.a. contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	EL (CHALKIDA)	participant	460˙750.00
7	ACCIONA CONSTRUCCION SA ACCIONA CONSTRUCCION SA Organization address address: AVENIDA DE EUROPA 18 PARQUE EMPRESARIAL city: ALCOBENDAS postcode: 28108 website: n.a. contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	ES (ALCOBENDAS)	participant	380˙000.00
8	IDRYMA TECHNOLOGIAS KAI EREVNAS IDRYMA TECHNOLOGIAS KAI EREVNAS Organization address address: N PLASTIRA STR 100 city: IRAKLEIO postcode: 70013 website: www.forth.gr contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	EL (IRAKLEIO)	participant	262˙717.00
9	STMICROELECTRONICS GRENOBLE 2 SAS STMICROELECTRONICS GRENOBLE 2 SAS Organization address address: RUE JULES HOROWITZ 12 city: GRENOBLE postcode: 38000 website: www.st.com contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	FR (GRENOBLE)	participant	139˙307.00

Map

Project objective

In order to reach exascale performance current HPC servers need to be improved. Simple scaling is not a feasible solution due to the increasing utility costs and power consumption limitations. Apart from improvements in implementation technology, what is needed is to refine the HPC application development as well as the architecture of the future HPC systems.

ECOSCALE tackles this challenge by proposing a scalable programming environment and hardware architecture tailored to the characteristics and trends of current and future HPC applications, reducing significantly the data traffic as well as the energy consumption and delays. We first propose a novel heterogeneous energy-efficient hierarchical architecture and a hybrid MPIOpenCL programming environment and runtime system. The proposed architecture, programming model and runtime system follows a hierarchical approach where the system is partitioned into multiple autonomous Workers (i.e. compute nodes). Workers are interconnected in a tree-like structure in order to form larger Partitioned Global Address Space (PGAS) partitions, which are further hierarchically interconnected via an MPI protocol.

Secondly, to further increase the energy efficiency of the system as well as its resilience, the Workers will employ reconfigurable accelerators that can perform coherent memory accesses in the virtual address space utilizing an IOMMU. The ECOSCALE architecture will support shared partitioned reconfigurable resources accessed by any Worker in a PGAS partition, and, more importantly, automated hardware synthesis of these resources from an OpenCL-based programming model.

We follow a co-design approach that spans a scalable HPC hardware platform, a middleware layer, a programming and a runtime environment as well as a high-level design environment for mapping applications onto the system. A proof of concept prototype and a simulator will be built in order to run two real-world HPC applications and several benchmarks.

Deliverables

List of deliverables.
Report on Co-design aspects	Documents, reports	2019-10-28 17:49:30
Evaluation of ECOSCALE platform	Documents, reports	2019-10-28 17:49:52
Guidelines for efficiently programming ECOSCALE	Documents, reports	2019-10-28 17:49:41
System integration and validation	Documents, reports	2019-10-28 17:49:22
Website	Websites, patent fillings, videos etc.	2019-09-06 08:50:57
Specs of Architecture and Prototype	Documents, reports	2019-09-06 08:50:57
Application analysis and system requirements	Documents, reports	2019-09-06 08:50:57
Development UNIMEM + UNILOGIC architecture	Other	2019-09-06 08:50:57
Initial version, integrated tool flow	Other	2019-09-06 08:50:57
Specifications of Reconfigurable systems and Tools	Documents, reports	2019-09-06 08:50:57
Platform simulator	Other	2019-09-06 08:50:57
Specifications of Systems Software and Programming Model	Documents, reports	2019-09-06 08:50:57

Take a look to the deliverables list in detail: detailed list of ECOSCALE deliverables.

Publications

List of publications.
year	authors and title	journal	last update
2018	Anuj Vaishnav, Khoa Dang Pham and Dirk Koch A Survey on FPGA Virtualization published pages: , ISSN: , DOI:	28th International Conference on Field Programmable Logic and Application (FPL)	2019-10-04
2018	Arslan Arif, Felipe A. Barrigon, Francesco Gregoretti, Javed Iqbal, Luciano Lavagno, Mihai Teodor Lazarescu, Liang Ma, Manuel Palomino, Javier L. L. Segura Performance and energy-efficient implementation of a smart city application on FPGAs published pages: , ISSN: 1861-8200, DOI: 10.1007/s11554-018-0792-x	Journal of Real-Time Image Processing	2019-10-03
2019	Evangelos Vasilakis, Vassilis Papaefstathiou, Pedro Trancoso, Ioannis Sourdis Decoupled Fused Cache published pages: 1-23, ISSN: 1544-3566, DOI: 10.1145/3293447	ACM Transactions on Architecture and Code Optimization 15/4	2019-10-03
2018	Ahsen Ejaz, Vassilios Papaefstathiou, Ioannis Sourdis DDRNoC published pages: 1-24, ISSN: 1544-3566, DOI: 10.1145/3200201	ACM Transactions on Architecture and Code Optimization 15/2	2019-10-03
2017	Liang Ma, Luciano Lavagno, Mihai Teodor Lazarescu, Arslan Arif Acceleration by Inline Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis published pages: 18953-18974, ISSN: 2169-3536, DOI: 10.1109/ACCESS.2017.2750923	IEEE Access 5	2019-09-06
2019	Tzilis, Stavros Runtime Management of Multiprocessor Systems for Fault Tolerance, Energy Efficiency and Load Balancing published pages: , ISSN: , DOI:		2019-09-06
2018	Ejaz, Ahsen DDRNoC: Dual Data-Rate Network-on-Chip published pages: , ISSN: , DOI:		2019-09-06
2016	Iakovos Mavroidis, Ioannis Papaefstathiou, Luciano Lavagno, Dimitrios S. Nikolopoulos, Dirk Koch, John Goodacre, Ioannis Sourdis, Vassilis Papaefstathiou, Marcello Coppola, Manuel Palomino ECOSCALE: Reconfigurable Computing and Runtime System for Future Exascale Systems published pages: , ISSN: , DOI:	Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016	2019-09-06
2016	Tiffany Trader EU Projects Unite on Heterogeneous ARM-based Exascale Prototype published pages: , ISSN: , DOI:	HPCWire February 24, 2016	2019-09-06
2017	Edson Horta, Xinzi Shen, Khoa Pham, Dirk Koch Accelerating Linux Bash Commands on FPGAs Using Partial Reconfiguration published pages: , ISSN: , DOI:	FPGAs for Software Programmers (FSP), 2017	2019-09-06
2016	Liang Ma, Fahad Bin Muslim, Luciano Lavagno High performance and low power monte carlo methods to option pricing models via high level design and synthesis published pages: , ISSN: , DOI:	European Modelling Symposium on mathematical modelling and computer simulation (EMS), 2016	2019-09-06
2016	P. Harvey, K. Bakanov, I. Spence, D. S. Nikolopoulos A Scalable Runtime for the ECOSCALE Heterogeneous Exascale Hardware Platform published pages: , ISSN: 0004-5411, DOI:	Association for Computing Machinery (ACM), 2016	2019-09-06

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