Coordinatore | COMMISSARIAT A L'ENERGIE ATOMIQUE
Organization address
address: BATIMENT LE PONANT D, 25 RUE LEBLANC contact info |
Nazionalità Coordinatore | France [FR] |
Totale costo | 3˙130˙780 € |
EC contributo | 2˙200˙000 € |
Programma | FP7-ICT
Specific Programme "Cooperation": Information and communication technologies |
Funding Scheme | CP |
Anno di inizio | 2008 |
Periodo (anno-mese-giorno) | 2008-01-01 - 2010-12-31 |
# | ||||
---|---|---|---|---|
1 |
COMMISSARIAT A L'ENERGIE ATOMIQUE
Organization address
address: BATIMENT LE PONANT D, 25 RUE LEBLANC contact info |
FR (PARIS CEDEX 15) | coordinator | 0.00 |
2 | CONSIGLIO NAZIONALE DELLE RICERCHE | IT | participant | 0.00 |
3 |
EBERHARD KARLS UNIVERSITAET TUEBINGEN
Organization address
address: Wilhelmstrasse 7 contact info |
DE (TUEBINGEN) | participant | 0.00 |
4 |
HITACHI EUROPE LIMITED
Organization address
address: LOWER COOKHAM ROAD contact info |
UK (MAIDENHEAD) | participant | 0.00 |
5 |
TECHNISCHE UNIVERSITEIT DELFT
Organization address
address: Stevinweg 1 contact info |
NL (DELFT) | participant | 0.00 |
6 |
THE UNIVERSITY OF MELBOURNE
Organization address
address: PARKVILLE OFFICE OF THE VICE CHANCELLOR contact info |
AU (MELBOURNE) | participant | 0.00 |
Esplora la "nuvola delle parole (Word Cloud) per avere un'idea di massima del progetto.
In this project, we wish to take advantage of a fundamental figure-of-merit of the CMOS transistors, the doping modulation, to propose new functionalities arising from the control of a single charge and spin on individual dopants in silicon.
The ultimate electrical switch is an atomic point contact. It has been realized and operated several times in laboratories at low temperature under the form of Quantum Point Contacts (QPC), metallic break junctions, molecules placed in an air gap. However a silicon atomic switch has not been realized yet. The devices will be manufactured within a mature technology on state-of-the-art CMOS platforms.
Contrarily to bottom-up approaches, there is an unavoidable dispersion in the average number and location of dopants, using masking and implantation CMOS techniques. Nevertheless several approaches are now addressing this question for top-down devices, and this option will be considered. Therefore, we will study single atomic devices, either real (i.e. dopant) or artificial (i.e. quantum dots), with a manageable dispersion by considering three generic cases: devices without dopant, devices with a targeted concentration of one dopant and devices with many dopants.
Devices without dopant will be based on ultimate silicon SET. A targeted size of 10nm is realistic, allowing operation at low temperature (but much above 4.2K). These devices are fully controlled and scalable.
Devices with one dopant or two dopants will be identified and selected from their electrical characteristics and then studied thoroughly. Relatively high operating temperatures up to room temperature are expected using donors with large ionisation energy. These devices are the smallest possible switches using the silicon technology. Because our ultimate SET present the decisive advantage of an immediate integration in the CMOS, the AFSID project will prove the validity of hybrid SET-CMOS approach by building a SET-FET hybrid device on chip.
Latin America-Europe Advanced Dialogues to Enhance ICT Research and Innovation partnerSHIP
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