MADNESS
Methods for predictAble Design of heterogeNeous Embedded System with adaptivity and reliability Support
| Coordinatore | UNIVERSITA DEGLI STUDI DI CAGLIARI
Organization address
address: Via Marengo 3 contact info |
| Nazionalità Coordinatore | Italy [IT] |
| Totale costo | 2˙895˙346 € |
| EC contributo | 1˙950˙000 € |
| Programma | FP7-ICT
Specific Programme "Cooperation": Information and communication technologies |
| Code Call | FP7-ICT-2009-4 |
| Funding Scheme | CP |
| Anno di inizio | 2010 |
| Periodo (anno-mese-giorno) | 2010-01-01 - 2013-03-31 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
UNIVERSITA DEGLI STUDI DI CAGLIARI
Organization address
address: Via Marengo 3 contact info |
IT (Cagliari) | coordinator | 0.00 |
| 2 |
INFORMATIK CENTRUM DORTMUND EV
Organization address
address: J.V. FRAUNHOFER STR. 20 contact info |
DE (DORTMUND) | participant | 0.00 |
| 3 |
INTEL BENELUX BV
Organization address
address: CARPONILAAN contact info |
NL (SCHIPHOL RIJK) | participant | 0.00 |
| 4 |
LANTIQ Deutschland GmbH
Organization address
address: Am Campeon contact info |
DE (Neubiberg) | participant | 0.00 |
| 5 |
UNIVERSITA DELLA SVIZZERA ITALIANA
Organization address
address: VIA LAMBERTENGHI contact info |
CH (LUGANO) | participant | 0.00 |
| 6 |
UNIVERSITEIT LEIDEN
Organization address
address: RAPENBURG contact info |
NL (LEIDEN) | participant | 0.00 |
| 7 |
UNIVERSITEIT VAN AMSTERDAM
Organization address
address: SPUI contact info |
NL (AMSTERDAM) | participant | 0.00 |
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Obiettivo del progetto (Objective)
The MADNESS project aims at the definition of innovative system-level design methodologies for embedded systems, able to drive the optimal composition of an heterogeneous MPSoC architecture, according to the requirements and the features of a given target application field.nnThe proposed methodologies will extend the classic concept of design space exploration, to cope with high heterogeneity, technology scaling, system reliability and multi-application demands, pursuing the following objectives:nn-Improve design predictability of highly heterogeneous embedded systems, bridging the so called 'implementation gap', i.e. the gap between the results that can be predicted during the system-level design phase and those eventually obtained after the on-silicon implementation.nn-Consider, apart from more traditional constraints (typically, cost, performance, power consumption), continued availability of service, taking into account fault recovery as one of the optimization factors to be satisfied.nn-Support adaptive runtime management of the architecture.nnThe technical approach of the project will rely on the following methods:nn-In order to improve the design predictability, traditional system-level design methodologies will be extended to consider variables strictly related with physical implementation of the architecture, leveraging a specific layer for rapid and accurate on-hardware FPGA-based emulation.nn-In order to address fault tolerance and adaptive runtime resources management, new methodologies are going to be defined and included in system-level exploration. Specific hardware/middleware IP modules will be developed to pursue those objectives.nnThe results of the project are expected to have a deep impact on the design flow for high-complexity embedded systems, facilitating and enhancing the exploration of the architectural design space, therefore resulting in a significantly increased overall productivity.