IDESA-2
Implementation of widespread IC design skills in advanced deep submicron technologies at European Academia
| Coordinatore | INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
Organization address
address: Kapeldreef 75 contact info |
| Nazionalità Coordinatore | Belgium [BE] |
| Totale costo | 1˙099˙772 € |
| EC contributo | 850˙000 € |
| Programma | FP7-ICT
Specific Programme "Cooperation": Information and communication technologies |
| Code Call | FP7-ICT-2009-4 |
| Funding Scheme | CSA |
| Anno di inizio | 2010 |
| Periodo (anno-mese-giorno) | 2010-09-01 - 2013-06-30 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
Organization address
address: Kapeldreef 75 contact info |
BE (LEUVEN) | coordinator | 0.00 |
| 2 |
COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Organization address
address: RUE LEBLANC contact info |
FR (PARIS 15) | participant | 0.00 |
| 3 |
ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE
Organization address
address: BATIMENT CE 3316 STATION 1 contact info |
CH (LAUSANNE) | participant | 0.00 |
| 4 |
KATHOLIEKE UNIVERSITEIT LEUVEN
Organization address
address: Oude Markt contact info |
BE (LEUVEN) | participant | 0.00 |
| 5 |
POLITECHNIKA WARSZAWSKA
Organization address
address: PLAC POLITECHNIKI contact info |
PL (WARSZAWA) | participant | 0.00 |
| 6 |
SCIENCE AND TECHNOLOGY FACILITIES COUNCIL
Organization address
address: Polaris House North Star Avenue contact info |
UK (SWINDON) | participant | 0.00 |
| 7 |
SLOVENSKA TECHNICKA UNIVERZITA V BRATISLAVE
Organization address
address: VAZOVOVA 5 contact info |
SK (BRATISLAVA) | participant | 0.00 |
| 8 |
TECHNISCHE UNIVERSITEIT DELFT
Organization address
address: Stevinweg contact info |
NL (DELFT) | participant | 0.00 |
Mappa
Word cloud
Esplora la "nuvola delle parole (Word Cloud) per avere un'idea di massima del progetto.
Obiettivo del progetto (Objective)
The IDESA-2 project is a follow-up of FP7 IDESA-1 support action that addresses training of academic staff (professors, assistant professors and lecturers) from all interested European academia. The sole purpose of the IDESA-2 project is to continue making available didactic training material on the design flow for integrated circuits for advanced deep sub-micron technologies, free of intellectual property rights, for the benefit of European academia. Didactic material was developed and made available for reuse in the course portfolio of bachelor and master engineering curricula in IDESA-1. Training is organised in class-based hands-on sessions and advanced seminars using state-of-the-art multimedia technology over the web or on DVD.nThere currently is a road show of 4 different advanced implementation courses that tour different sites in Europe. These courses are hands-on courses using a train-the-trainer philosophy. All of these courses address the advanced implementation issues relating to the 90 nm process node. This brings the universities to a more advanced level of implementation skills to start engaging in 65- and 45-nm issues.nThe consortium has built a portfolio of public domain didactic seminars, addressing issues that are not addressed in the design flow courses but that start being of dominant importance for the 65 and 45 nm generation design flows. At the end of the IDESA-1 project (in May 2010), 35 didactic tutorials will be in the portfolio. The portfolio was established with the assistance of a Program Board consisting of representatives of the industry (both IDM and EDA) and of the Education and Training Working Group (ETWG) of ENIAC.nIDESA-1 allowed to reach 16-25% of the target population (about 600 European universities, polytechnic schools and research institutes). The IDESA-2 project, that will only start after IDESA-1 is finished, intends to double the number of academia that will benefit from the ongoing IDESA-1 action.