ADVANTAG5 SIGNED
Advanced Wide-Band Transceiver Architectures for Beyond 5G Wireless Systems
Total Cost €
0EC-Contrib. €
0Partnership
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Explore the words cloud of the ADVANTAG5 project. It provides you a very rough idea of what is the project "ADVANTAG5" about.
Project "ADVANTAG5" data sheet
The following table provides information about the project.
| Coordinator |
AALTO KORKEAKOULUSAATIO SR
Organization address contact info |
| Coordinator Country | Finland [FI] |
| Project website | https://research.aalto.fi/en/projects/advanced-wideband-transceiver-architectures-for-beyond-5g-wireless-systems |
| Total cost | 267˙793 € |
| EC max contribution | 267˙793 € (100%) |
| Programme |
1. H2020-EU.1.3.2. (Nurturing excellence by means of cross-border and cross-sector mobility) |
| Code Call | H2020-MSCA-IF-2015 |
| Funding Scheme | MSCA-IF-GF |
| Starting year | 2017 |
| Duration (year-month-day) | from 2017-06-01 to 2020-05-31 |
Partnership
Take a look of project's partnership.
| # | ||||
|---|---|---|---|---|
| 1 | AALTO KORKEAKOULUSAATIO SR | FI (ESPOO) | coordinator | 267˙793.00 |
| 2 | THE REGENTS OF THE UNIVERSITY OF CALIFORNIA | US (OAKLAND CA) | partner | 0.00 |
Map
Project objective
The fifth generation and beyond radio systems targets 1000 times traffic volumes compared to present state-of-the-art. In order to guarantee the quality of service, communication capacity leap of three orders of magnitude requires sophisticated interference management and communication channel protection from the interference generated by other users. The objective of this project is to develop integrated transceiver hardware structures for massive MIMO/beam forming antenna arrays, supporting agile carrier aggregation, digitally assisted interference management, and full duplex communication, thus enhancing communication efficiency in spatial, temporal and frequency domains.
The evolution of communications systems inherently relies on integrated microelectronic circuits. In circuits developed in this project, we will fully exploit the digital-driven process evolution by utilizing digitally intensive time/phase domain signal processing as much as possible to minimize the effect of existing discrepancy between digital-driven process scaling and analog circuit design. The developed structures will take advantage of time/phase domain signal processing, taking full advantage of CMOS process evolution and inherently supporting beam forming antenna array structures.
We will demonstrate the effectiveness of design methods by implementing transceiver hardware structures for massive transceiver arrays. Digitally reconfigurable transceiver arrays will enable spatial multiplexing, agile carrier aggregation and digitally assisted interference management to enhance communication efficiency in spatial, temporal and frequency domains, enabling the targeted capacity leap.
Publications
| year | authors and title | journal | last update |
|---|---|---|---|
| 2019 |
F. U. Haq, M. Englund, Y. Antonov, K. Stadius, M. Kosunen, K. B. Östman, K. Koli, and J. Ryynänen A blocker-tolerant two-stage harmonic-rejection rf front-end published pages: , ISSN: , DOI: |
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Jun. 2, 2019. | 2019-09-02 |
| 2019 |
Jerry Lemberg, Mikko Martelius, Enrico Roverato, Yury Antonov, Tero Nieminen, Kari Stadius, Lauri Anttila, Mikko Valkama, Marko Kosunen, Jussi Ryynanen A 1.5–1.9-GHz All-Digital Tri-Phasing Transmitter With an Integrated Multilevel Class-D Power Amplifier Achieving 100-MHz RF Bandwidth published pages: 1517-1527, ISSN: 0018-9200, DOI: 10.1109/jssc.2019.2902753 |
IEEE Journal of Solid-State Circuits 54/6 | 2019-09-02 |
| 2018 |
Jerry Lemberg, Mikko Martelius, Marko Kosunen, Enrico Roverato, Kari Stadius, Lauri Anttila, Mikko Valkama, Jussi Ryynanen Tri-Phasing Modulation for Efficient and Wideband Radio Transmitters published pages: 3085-3098, ISSN: 1549-8328, DOI: 10.1109/TCSI.2018.2821269 |
IEEE Transactions on Circuits and Systems I: Regular Papers 65/9 | 2019-09-02 |
| 2018 |
Enrico Roverato, Marko Kosunen, Jerry Lemberg, Mikko Martelius, Kari Stadius, Lauri Anttila, Mikko Valkama, Jussi Ryynanen A High-Speed DSP Engine for First-Order Hold Digital Phase Modulation in 28-nm CMOS published pages: 1959-1963, ISSN: 1549-7747, DOI: 10.1109/TCSII.2018.2818759 |
IEEE Transactions on Circuits and Systems II: Express Briefs 65/12 | 2019-09-02 |
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