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EuroEXA SIGNED

Co-designed Innovation and System for Resilient Exascale Computing in Europe: From Applications to Silicon

Total Cost €

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EC-Contrib. €

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Partnership

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 EuroEXA project word cloud

Explore the words cloud of the EuroEXA project. It provides you a very rough idea of what is the project "EuroEXA" about.

allin    physics    solution    latency    embrace    demands    breaking    geographically    renewables    science    weather    tooling    peak    create    communicating    run    domains    fault    rating    foundation    pflop    ing    power    memory    platforms    co    scalable    stack    efficient    life    mechanisms    levels    performance    local    exascale    brings    infrastructure    supporting    cooling    interconnect    acceleration    monitored    rack    times    compute    bottleneck    fpga    climate    collapse    scaling    topology    links    optimization    industrial    sme    computing    heterogeneous    die    resilience    intensive    tape    prototype    holistic    pue    parity    mix    efficiency    extreme    hosted    architecture    flop    ethernet    data    deployment    zpt    inter    enabled    multiple    modular    shared    400    ground    integration    30mw    components    homogenised    flow    envelope    immersion    ice    switching    adoption    bandwidth    software    hybrid    balanced    bioinformatics    energy    runtime    max    euroexa    failures    stfc    hpc    platform    completion    switches    peta   

Project "EuroEXA" data sheet

The following table provides information about the project.

Coordinator
INSTITUTE OF COMMUNICATION AND COMPUTER SYSTEMS 

Organization address
address: Patission Str. 42
city: ATHINA
postcode: 10682
website: www.iccs.gr

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Greece [EL]
 Project website https://euroexa.eu/
 Total cost 19˙949˙022 €
 EC max contribution 19˙949˙022 € (100%)
 Programme 1. H2020-EU.1.2.2. (FET Proactive)
 Code Call H2020-FETHPC-2016
 Funding Scheme RIA
 Starting year 2017
 Duration (year-month-day) from 2017-09-01   to  2021-02-28

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    INSTITUTE OF COMMUNICATION AND COMPUTER SYSTEMS EL (ATHINA) coordinator 748˙250.00
2    THE UNIVERSITY OF MANCHESTER UK (MANCHESTER) participant 5˙134˙190.00
3    ICEOTOPE RESEARCH & DEVELOPMENT LTD UK (ROTHERHAM) participant 4˙201˙418.00
4    BARCELONA SUPERCOMPUTING CENTER - CENTRO NACIONAL DE SUPERCOMPUTACION ES (BARCELONA) participant 1˙259˙937.00
5    IDRYMA TECHNOLOGIAS KAI EREVNAS EL (IRAKLEIO) participant 1˙245˙000.00
6    MAXELER TECHNOLOGIES LIMITED UK (LONDON) participant 1˙245˙000.00
7    UNITED KINGDOM RESEARCH AND INNOVATION UK (SWINDON) participant 951˙875.00
8    ZEROPOINT TECHNOLOGIES AB SE (GOTEBORG) participant 842˙500.00
9    ISTITUTO NAZIONALE DI FISICA NUCLEARE IT (FRASCATI) participant 726˙875.00
10    FRAUNHOFER GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V. DE (MUNCHEN) participant 705˙712.00
11    EUROPEAN CENTRE FOR MEDIUM-RANGE WEATHER FORECASTS UK (READING) participant 669˙156.00
12    NEURASMUS BV NL (ROTTERDAM) participant 520˙187.00
13    SYNELIXIS LYSEIS PLIROFORIKIS AUTOMATISMOU & TILEPIKOINONION ANONIMI ETAIRIA EL (CHALKIDA) participant 516˙250.00
14    INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM BE (LEUVEN) participant 454˙920.00
15    ARM LIMITED UK (CAMBRIDGE) participant 364˙500.00
16    ISTITUTO NAZIONALE DI ASTROFISICA IT (ROMA) participant 363˙250.00
17    SCIENCE AND TECHNOLOGY FACILITIES COUNCIL UK (SWINDON) participant 0.00

Map

 Project objective

To achieve the demands of extreme scale and the delivery of exascale, we embrace the computing platform as a whole, not just component optimization or fault resilience. EuroEXA brings a holistic foundation from multiple European HPC projects and partners together with the industrial SME focus of MAX for FPGA data-flow; ICE for infrastructure; ALLIN for HPC tooling and ZPT to collapse the memory bottleneck; to co-design a ground-breaking platform capable of scaling peak performance to 400 PFLOP in a peak system power envelope of 30MW; over four times the performance at four times the energy efficiency of today’s HPC platforms. Further, we target a PUE parity rating of 1.0 through use of renewables and immersion-based cooling.

We co-design a balanced architecture for both compute- and data-intensive applications using a cost-efficient, modular-integration approach enabled by novel inter-die links and the tape-out of a resulting EuroEXA processing unit with integration of FPGA for data-flow acceleration. We provide a homogenised software platform offering heterogeneous acceleration with scalable shared memory access and create a unique hybrid geographically-addressed, switching and topology interconnect within the rack while enabling the adoption of low-cost Ethernet switches offering low-Latency and high-switching bandwidth. Working together with a rich mix of key HPC applications from across climate/weather, physics/energy and life-science/bioinformatics domains we will demonstrate the results of the project through the deployment of an integrated and operational peta-flop level prototype hosted at STFC. Supported by run-to-completion platform-wide resilience mechanisms, components will manage local failures, while communicating with higher levels of the stack. Monitored and controlled by advanced runtime capabilities, EuroEXA will demonstrate its co-design solution supporting both existing pre-exascale and project-developed exascale applications.

 Deliverables

List of deliverables.
Communication & Dissemination Strategy Documents, reports 2020-03-23 12:27:49
Communication & Dissemination Activities Report v1 Documents, reports 2020-03-23 12:27:49
Data Management Plan Open Research Data Pilot 2020-03-23 12:27:49

Take a look to the deliverables list in detail:  detailed list of EuroEXA deliverables.

 Publications

year authors and title journal last update
List of publications.
2017 George Chatzikonstantis, Diego Jiménez, Esteban Meneses, Christos Strydis, Harry Sidiropoulos, Dimitrios Soudris
From Knights Corner to Landing: A Case Study Based on a Hodgkin-Huxley Neuron Simulator
published pages: 363-375, ISSN: , DOI: 10.1007/978-3-319-67630-2_27
Lecture Notes in Computer Science book series (LNCS, volume 10524) 2020-03-23
2017 Georgios Smaragdos, Georgios Chatzikonstantis, Rahul Kukreja, Harry Sidiropoulos, Dimitrios Rodopoulos, Ioannis Sourdis, Zaid Al-Ars, Christoforos Kachris, Dimitrios Soudris, Chris I De Zeeuw, Christos Strydis
BrainFrame: a node-level heterogeneous accelerator platform for neuron simulations
published pages: 66008, ISSN: 1741-2560, DOI: 10.1088/1741-2552/aa7fc5
Journal of Neural Engineering 14/6 2020-03-23
2017 George Chatzikonstantis, Dimitrios Rodopoulos, Christos Strydis, Chris I. De Zeeuw, Dimitrios Soudris
Optimizing Extended Hodgkin-Huxley Neuron Model Simulations for a Xeon/Xeon Phi Node
published pages: 2581-2594, ISSN: 1045-9219, DOI: 10.1109/TPDS.2017.2686389
IEEE Transactions on Parallel and Distributed Systems 28/9 2020-03-23
2018 Kyunghun Kim, Antonio J. Peña, Paul Carpenter, Polydoros Petrakis, Manolis Ploumidits, Nikolaos Dimou, Yanfei Guo, Kenneth Raffenetti and Pavan Balaji
Toward Developing a Unimem OFI Provider for MPI Support
published pages: , ISSN: , DOI:
2020-03-23
2017 Peter Hopton
Supercomputing in the EU, An Introduction to EuroEXA
published pages: , ISSN: , DOI:
2020-03-23
2018 Amir Zjajo, Jaco Hofmann, Gerrit Jan Christiaanse, Martijn van Eijk, Georgios Smaragdos, Christos Strydis, Alexander de Graaf, Carlo Galuzzi, Rene van Leuken
A Real-Time Reconfigurable Multichip Architecture for Large-Scale Biophysically Accurate Neuron Simulation
published pages: 326-337, ISSN: 1932-4545, DOI: 10.1109/TBCAS.2017.2780287
IEEE Transactions on Biomedical Circuits and Systems 12/2 2020-03-23
2018 Jaume Bosch, Xubin Tan, Antonio Filgueras, Miquel Vidal, Marc Mateu, Daniel Jiménez-González, Carlos Álvarez, Xavier Martorell, Eduard Ayguadé and Jesus Labarta
Application Acceleration on FPGAs with OmpSs@FPGA
published pages: , ISSN: , DOI:
2020-03-23

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