Coordinatore | AALTO-KORKEAKOULUSAATIO
Organization address
address: OTAKAARI 1 contact info |
Nazionalità Coordinatore | Finland [FI] |
Sito del progetto | http://webhotel2.tut.fi/fys/mordred/ |
Totale costo | 5˙039˙560 € |
EC contributo | 3˙624˙853 € |
Programma | FP7-NMP
Specific Programme "Cooperation": Nanosciences, Nanotechnologies, Materials and new Production Technologies |
Code Call | FP7-NMP-2010-SMALL-4 |
Funding Scheme | CP-FP |
Anno di inizio | 2011 |
Periodo (anno-mese-giorno) | 2011-04-01 - 2015-03-31 |
# | ||||
---|---|---|---|---|
1 |
AALTO-KORKEAKOULUSAATIO
Organization address
address: OTAKAARI 1 contact info |
FI (ESPOO) | coordinator | 319˙184.03 |
2 |
INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
Organization address
address: Kapeldreef 75 contact info |
BE (LEUVEN) | participant | 616˙540.25 |
3 |
KATHOLIEKE UNIVERSITEIT LEUVEN
Organization address
address: Oude Markt 13 contact info |
BE (LEUVEN) | participant | 595˙500.00 |
4 |
UNIVERSITY COLLEGE LONDON
Organization address
address: GOWER STREET contact info |
UK (LONDON) | participant | 509˙581.25 |
5 |
Gold Standard Simulations ltd
Organization address
address: Mitchell Street 90 Gordon Chambers contact info |
UK (Glasgow) | participant | 394˙557.00 |
6 |
UNIVERSITY OF GLASGOW
Organization address
address: University Avenue contact info |
UK (GLASGOW) | participant | 374˙991.75 |
7 |
TECHNISCHE UNIVERSITAET WIEN
Organization address
address: Karlsplatz 13 contact info |
AT (WIEN) | participant | 335˙250.00 |
8 |
INFINEON TECHNOLOGIES AG
Organization address
address: Am Campeon 1-12 contact info |
DE (Neubiberg) | participant | 324˙992.97 |
9 |
TTY-SAATIO
Organization address
address: Korkeakoulunkatu 10 contact info |
FI (TAMPERE) | participant | 154˙255.80 |
Esplora la "nuvola delle parole (Word Cloud) per avere un'idea di massima del progetto.
'In this project we will develop multiscale modelling technology supported by comprehensive experimental characterization techniques to study the degradation and reliability of next generation Complimentary-Metal-Oxide-Semiconductor (CMOS) devices. Building upon fundamental analysis of the structure and electronic properties of relevant materials and interfaces at the quantum mechanical level, we will construct mesoscale models to account for defect generation and impact on CMOS transistor and circuit performance and yield. The models will provide detailed understanding of the common reliability issues and degradation routes, and will be verified by cutting edge experimental characterization. Strong links with industry insures that the project will make a step change in the process of next generation device modelling and design. The project will provide technologists, device engineers and designers in the nano CMOS industry with tools, reference databases and examples of how to produce next generation devices that are economical, efficient, and meet performance, reliability and degradation standards.'
Conventional electronics are reaching their limit in performance capability. Scientists are developing modelling tools to assist designers in creating the next generation of high-power, low-degradation ultra-small electronics.
Semi-conductors, materials whose electrical conductivity is between that of an insulator and a conductor, are critical to the design of modern-day electronics including transistors, laser diodes and computer processing circuitry. Silicon-based complimentary-metal-oxide-semiconductor (CMOS) technology has become the industry standard for transistors enabling excellent efficiency translating to low-power consumption over long periods of time.
Employed in new systems with transistors of sizes in the range of nanometres (nm), CMOS technology starts to fail in less than five years compared to the decade or more of previous CMOS devices. Scientists initiated the EU-funded 'Modelling of the reliability and degradation of next generation nanoelectronic devices' (Mordred) project with the ultimate objective of increasing the reliability of nanoelectronic devices.
Mordred is integrating fundamental experimental analysis of material properties at the quantum mechanical level with medium-scale (mesoscale) models. They will then be in a position to evaluate the impact of degradation on CMOS transistor and circuit performance and yield. In addition, scientists are developing a reference database enabling designers and engineers to correlate measured signals with sources of degradation.
During the first project year, scientists developed software for modelling force fields at semiconductor/oxide and metal/oxide interfaces. They also derived mathematical models of processes affecting the development of certain defects in semiconductor devices (non-radiative multi-phonon processes, bias temperature instability, hot carrier injection). The developments represent significant enhancements in initial objectives and enable highly efficient device and circuit simulation.
In addition, Mordred delivered all promised samples. Comprehensive current drain-gate voltage (Id-Vg) characteristics were measured on multiple devices under specific conditions allowing scientists to group them and compare them to device simulations and thus improve models. Statistical extraction of parameters associated with physical effects of random variability at high- and low-drain voltage demonstrated that the model accurately captures device behaviour.
Over the past 40 years, the electronics industry has been characterised by increasing transistor density on chips and ever smaller chips. New materials are being used to enhance performance while reducing power consumption. Mordred will deliver the design tools necessary to ensure that the next generation of nanoelectronics exhibits enhanced performance and reliability over longer operational lifetimes.