COMPLEX
CO-design and Power Management in PLatform-based nDesign Space EXploration
| Coordinatore | OFFIS E.V.
Organization address
address: Escherweg 2 contact info |
| Nazionalità Coordinatore | Germany [DE] |
| Totale costo | 7˙049˙256 € |
| EC contributo | 4˙708˙736 € |
| Programma | FP7-ICT
Specific Programme "Cooperation": Information and communication technologies |
| Code Call | FP7-ICT-2009-4 |
| Funding Scheme | CP |
| Anno di inizio | 2009 |
| Periodo (anno-mese-giorno) | 2009-12-01 - 2013-03-31 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
OFFIS E.V.
Organization address
address: Escherweg 2 contact info |
DE (Oldenburg) | coordinator | 0.00 |
| 2 |
EDALab srl
Organization address
address: Strada le Grazie contact info |
IT (Verona) | participant | 0.00 |
| 3 |
EUROPEAN ELECTRONIC CHIPS & SYSTEMS DESIGN INITIATIVE
Organization address
address: AVENUE DE VIGNATE 2 contact info |
FR (Gieres) | participant | 0.00 |
| 4 |
GMV AEROSPACE AND DEFENCE SA UNIPERSONAL
Organization address
address: CALLE ISAAC NEWTON contact info |
ES (TRES CANTOS - MADRID) | participant | 0.00 |
| 5 |
INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
Organization address
address: Kapeldreef contact info |
BE (LEUVEN) | participant | 0.00 |
| 6 |
MAGILLEM DESIGN SERVICES SAS
Organization address
address: RUE DE LA PIERRE LEVEE contact info |
FR (PARIS) | participant | 0.00 |
| 7 |
POLITECNICO DI MILANO
Organization address
address: PIAZZA LEONARDO DA VINCI contact info |
IT (MILANO) | participant | 0.00 |
| 8 |
POLITECNICO DI TORINO
Organization address
address: CORSO DUCA DEGLI ABRUZZI contact info |
IT (TORINO) | participant | 0.00 |
| 9 |
SNPS BELGIUM NV
Organization address
address: INTERLEUVENLAAN contact info |
BE (LEUVEN) | participant | 0.00 |
| 10 |
STMICROELECTRONICS (BEIJING) R&D CO LTD
Organization address
address: 12B/F YINGU BUILDING, 9 NORTHWEST FOURTH RING ROAD contact info |
CN (HAIDIAN DISTRICT, BEIJING) | participant | 0.00 |
| 11 |
STMICROELECTRONICS SRL
Organization address
address: VIA C.OLIVETTI contact info |
IT (AGRATE BRIANZA) | participant | 0.00 |
| 12 |
THALES COMMUNICATIONS & SECURITY SAS
Organization address
address: Boulevard de Valmy contact info |
FR (COLOMBES) | participant | 0.00 |
| 13 |
UNIVERSIDAD DE CANTABRIA
Organization address
address: AVENIDA DE LOS CASTROS contact info |
ES (SANTANDER) | participant | 0.00 |
Mappa
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Obiettivo del progetto (Objective)
The main objective of the COMPLEX project is to increase the competitiveness of the European semiconductor, system integrator and EDA industry by addressing the problem of platform-based design space exploration under consideration of power and performance constraints early in the design process. High performance usually causes high power consumption. A main challenge in today's embedded system design is to find the perfect balance between performance and power. This balance can not be found efficiently and at high quality, because until now no generic framework for accurately and jointly estimating performance and power consumption starting at the algorithmic level is available. This can only be achieved in cooperation on a European level, taking into account European platform providers, system developers/integrators, EDA companies, Universities and research institutes from both, the HW and the embedded SW world.
The COMPLEX project will enable the European semiconductor and electronic system industry to achieve a break through in product quality through substantially improved performance and power efficiency. This quantum leap will be achieved by a new design environment for platform-based design-space exploration offering developers of next-generation mobile and embedded systems a highly efficient and productive design methodology and tool chain allowing them to iteratively explore and refine their applications to meet market requirements. The design technology in particular enables the fast simulation and assessment of the platform at Electronic System Level (ESL) with up to cycle accuracy at the earliest instant in the design process. Several new modelling, exploration and simulation concepts will be developed and combined with well established ESL synthesis, cross-compilation, analysis and simulation tools into a seamless holistic design flow enabling performance & power aware virtual prototyping from a combined hardware-software perspective.