Coordinatore | STMICROELECTRONICS SRL
Organization address
address: VIA C.OLIVETTI 2 contact info |
Nazionalità Coordinatore | Italy [IT] |
Totale costo | 752˙481 € |
EC contributo | 752˙481 € |
Programma | FP7-PEOPLE
Specific programme "People" implementing the Seventh Framework Programme of the European Community for research, technological development and demonstration activities (2007 to 2013) |
Code Call | FP7-PEOPLE-2009-IAPP |
Funding Scheme | MC-IAPP |
Anno di inizio | 2010 |
Periodo (anno-mese-giorno) | 2010-10-01 - 2014-09-30 |
# | ||||
---|---|---|---|---|
1 |
STMICROELECTRONICS SRL
Organization address
address: VIA C.OLIVETTI 2 contact info |
IT (AGRATE BRIANZA) | coordinator | 172˙296.00 |
2 |
UNIVERSITA DEGLI STUDI DI ROMA LA SAPIENZA
Organization address
address: Piazzale Aldo Moro 5 contact info |
IT (ROMA) | participant | 271˙472.00 |
3 |
FRAUNHOFER-GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V
Organization address
address: Hansastrasse 27C contact info |
DE (MUENCHEN) | participant | 162˙362.00 |
4 |
MUNEDA GmbH
Organization address
address: Stefan-George-Ring 29 contact info |
DE (Munich) | participant | 146˙351.00 |
Esplora la "nuvola delle parole (Word Cloud) per avere un'idea di massima del progetto.
'Cost control, production efficiency, cycle time and yield are critical quality benchmark for nanoelectronics productions. An increasingly important downside of nano-CMOS technology scaling is the fact that the scaling of feature sizes cannot be accompanied by a suitable scaling of geometric tolerances. In addition, when getting into deep miniaturized dimensions, phenomena like edges or surfaces roughness, or the fluctuation of the number of doping atoms within the channels are becoming increasingly significant. As a result, the figures of merit of a circuit, such as performance and power, have become extremely sensitive to uncontrollable statistical process variations (PV). To ensure stable manufacturability and secure high manufacturing yield, it is mandatory to manage complete design flows and to link traditional methods for design with Technology CAD models. In this context, multi-objective optimization algorithms and statistical analysis are essential on device and behavioral levels to secure high yielding by modeling the impact of inevitable process variations and doping fluctuations on IC performance. Statistical circuit modeling is a viable solution to nano-electronics production quality, on which the European Union is already investing. The project intends to create a partnership between academies, industry and SME so to create a Transfer of Knowledge between the organizations in order to pass the mathematical know how on multi-objective optimization, symbolic techniques and numerical statistical simulation on one side, the industrial design experience, real test cases availability and Electronic Design Automation (EDA) software modeling skills on the other. The scope of the research activity will be to create PV-aware and PV-robust circuit design techniques, tools and models in the frame of the analogue and mixed-signal circuit industrial design.'
The downside of scaling nanoelectronic feature sizes is increasing unreliability of performance and power (hence robustness). An EU-supported project has developed techniques to tackle this problem.
Unraveling the role of Nucleotide Excision Repair factors and the dynamic of chromatin structure in the repair of oxidative DNA damages in vivo
Read MoreHydrated Injection of Biomolecules into X-ray Free Electron Lasers (XFEL)
Read MoreThe significance of stable isotopes as dietary indicators in ancient terrestrial ecosystems
Read More