Coordinatore | INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
Organization address
address: Kapeldreef 75 contact info |
Nazionalità Coordinatore | Belgium [BE] |
Totale costo | 2˙844˙010 € |
EC contributo | 1˙993˙216 € |
Programma | FP7-SPACE
Specific Programme "Cooperation": Space |
Code Call | FP7-SPACE-2011-1 |
Funding Scheme | CP-FP |
Anno di inizio | 2011 |
Periodo (anno-mese-giorno) | 2011-11-01 - 2014-10-31 |
# | ||||
---|---|---|---|---|
1 |
INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
Organization address
address: Kapeldreef 75 contact info |
BE (LEUVEN) | coordinator | 940˙060.00 |
2 |
Excico France
Organization address
city: Gennevilliers contact info |
FR (Gennevilliers) | participant | 493˙296.00 |
3 |
SELEX ES SPA
Organization address
address: VIA PIEMONTE 60 contact info |
IT (ROMA) | participant | 349˙900.00 |
4 |
NEDERLANDSE ORGANISATIE VOOR TOEGEPAST NATUURWETENSCHAPPELIJK ONDERZOEK TNO
Organization address
address: Schoemakerstraat 97 contact info |
NL (DEN HAAG) | participant | 209˙960.00 |
5 |
SELEX GALILEO SPA
Organization address
address: Via Albert Einstein 35 contact info |
IT (CAMPI BISENZIO) | participant | 0.00 |
Esplora la "nuvola delle parole (Word Cloud) per avere un'idea di massima del progetto.
'The main goal of this project is the creation of a European supply chain for state-of-the art CMOS imagers. As identified by both ESA and the EC, there is a need for such a supply chain for CMOS imagers for space applications which uses solely European (and hence ITAR-free) sources. This goal will be realized using the proposed consortium as all partners have excellent know-how and track record in the expertise fields required. A second goal of the project is to push the performance of CMOS imagers and match the requirements for the (typically very demanding) space applications. Hence large area (much larger than commercial imagers) high sensitivity imagers will be developed using stitching technology and backside thinning. A key element here is the backside passivation process using laser annealing. The outcome of this project is a CMOS imager design and manufacturing platform that can be used by the space industry (ESA, CNES, satellite manufacturers, ... ) for their future space imager needs. However, it will as well serve (and will be open for) other high-end imager needs in e.g. medical or security applications.'
EU-funded scientists are developing a design and manufacturing platform to enable space applications of high-tech imaging systems. Consisting solely of European suppliers, it will be free of international trade restrictions.
Image sensors transform captured light into a digital signal that, when viewed with appropriate technology, recreates the image. Complementary metal oxide semiconductor (CMOS) image sensors are rapidly gaining market ground as low-power, high-resolution devices. Both the European Space Agency (ESA) and the European Commission have identified a need for development of CMOS image sensors (CIS) for space applications using solely European sources (independent of International Traffic in Arms Regulations (ITAR)).
EU-funded scientists are now filling that need with the project 'Platform for European CMOS imagers' (EUROCIS). They are establishing the CIS design and manufacturing platform as well as pushing the frontiers of commercial technology to match the demanding requirements of space. Key to success is backside passivation using laser annealing (enhancement of chemical stability by heating and slow cooling). Other high-end applications such as those in biomedicine or security are sure to follow.
During the first 12 months, scientists developed the design specifications for a space detector likely to be needed in future missions and came up with the preliminary design. Components are currently being fabricated and, in parallel, processes including laser annealing of the backside junction are being optimised through experiments and modelling. The team is also evaluating the application of post-processing coatings to reduce reflection and enhance transmission on silicon surfaces.