i-RISC
Innovative Reliable Chip Designs from Low-Powered Unreliable Components
| Coordinatore | COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Organization address
address: Rue des Martyrs 17 contact info |
| Nazionalità Coordinatore | France [FR] |
| Totale costo | 2˙161˙095 € |
| EC contributo | 1˙613˙284 € |
| Programma | FP7-ICT
Specific Programme "Cooperation": Information and communication technologies |
| Code Call | FP7-ICT-2011-C |
| Funding Scheme | CP |
| Anno di inizio | 2013 |
| Periodo (anno-mese-giorno) | 2013-02-01 - 2016-01-31 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Organization address
address: Rue des Martyrs 17 contact info |
FR (Grenoble) | coordinator | 0.00 |
| 2 |
ECOLE NATIONALE SUPERIEURE DE L'ELECTRONIQUE ET DE SES APPLICATIONS
Organization address
address: 6 AVENUE DU PONCEAU contact info |
FR (CERGY CEDEX) | participant | 0.00 |
| 3 |
TECHNISCHE UNIVERSITEIT DELFT
Organization address
address: Stevinweg contact info |
NL (DELFT) | participant | 0.00 |
| 4 |
UNIVERSITATEA POLITEHNICA DIN TIMISOARA
Organization address
address: PIATA VICTORIEI 2 contact info |
RO (TIMISOARA) | participant | 0.00 |
| 5 |
UNIVERSITY COLLEGE CORK, NATIONAL UNIVERSITY OF IRELAND, CORK
Organization address
address: Western Road contact info |
IE (CORK) | participant | 0.00 |
| 6 |
UNIVERSITY OF NIS- FACULTY OF ELECTRONIC ENGINEERING
Organization address
address: Aleksandra Medvedeva contact info |
RS (Nis) | participant | 0.00 |
Mappa
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Obiettivo del progetto (Objective)
The ongoing miniaturization of data processing and storage devices and the imperative of low-energy consumption can only be sustained through low-powered components. Lower supply voltages and variations in technological process of emerging nanoelectronic devices make them inherently unreliable. As a consequence, the nanoscale integration of chips built out of unreliable components has emerged as one of the most critical challenges for the next-generation electronic circuit design. To make such nanoscale integration economically viable, new solutions for efficient and fault-tolerant data processing and storage must now be invented. The i-RISC project aims at achieving these goals, by providing innovative fault-tolerant solutions at both device- and system-level that are fundamentally rooted in mathematical models, algorithms, and techniques of information theory. Proposed solutions will build on error correcting codes and encoder/decoder architectures able to provide reliable error protection even if they themselves operate on unreliable hardware. The project will develop the scientific foundation and provide a first proof-of-concept by validating the proposed solutions on accurate error models and energy measurement tools developed within the project. In the forthcoming challenge of nanoscale technologies, the i-RISC project is an essential prerequisite for preparing the European industry for this paradigm shift.