GRAND
Graphene-based Nanoelectronic Devices
| Coordinatore | GESELLSCHAFT FUR ANGEWANDTE MIKRO UND OPTOELEKTRONIK MIT BESCHRANKTERHAFTUNG AMO GMBH
Organization address
address: Otto-Blumenthal-Str. 25 contact info |
| Nazionalità Coordinatore | Germany [DE] |
| Totale costo | 3˙155˙804 € |
| EC contributo | 2˙389˙704 € |
| Programma | FP7-ICT
Specific Programme "Cooperation": Information and communication technologies |
| Code Call | FP7-ICT-2007-1 |
| Funding Scheme | CP |
| Anno di inizio | 2008 |
| Periodo (anno-mese-giorno) | 2008-01-01 - 2011-06-30 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
GESELLSCHAFT FUR ANGEWANDTE MIKRO UND OPTOELEKTRONIK MIT BESCHRANKTERHAFTUNG AMO GMBH
Organization address
address: Otto-Blumenthal-Str. 25 contact info |
DE (Aachen) | coordinator | 0.00 |
| 2 |
ALMA MATER STUDIORUM-UNIVERSITA DI BOLOGNA
Organization address
address: VIA ZAMBONI 33 contact info |
IT (BOLOGNA) | participant | 0.00 |
| 3 |
COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Organization address
address: BATIMENT LE PONANT D, 25 RUE LEBLANC contact info |
FR (PARIS CEDEX 15) | participant | 0.00 |
| 4 |
CONSORZIO NAZIONALE INTERUNIVERSITARIO PER LA NANOELETTRONICA
Organization address
address: VIA TOFFANO 2 contact info |
IT (BOLOGNA) | participant | 0.00 |
| 5 |
THE CHANCELLOR, MASTERS AND SCHOLARS OF THE UNIVERSITY OF CAMBRIDGE
Organization address
address: THE OLD SCHOOLS, TRINITY LANE contact info |
UK (CAMBRIDGE) | participant | 0.00 |
| 6 |
UNIVERSITA DEGLI STUDI DI UDINE
Organization address
address: VIA PALLADIO 8 contact info |
IT (UDINE) | participant | 0.00 |
| 7 |
UNIVERSITA DI PISA
Organization address
address: LUNGARNO PACINOTTI 43/44 contact info |
IT (PISA) | participant | 0.00 |
| 8 |
UNIVERSITY COLLEGE CORK, NATIONAL UNIVERSITY OF IRELAND, CORK
Organization address
address: WESTERN ROAD contact info |
IE (CORK) | participant | 0.00 |
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Obiettivo del progetto (Objective)
The semiconductor industry is a cornerstone of today's high-tech economy, supporting over 100,000 direct and even more indirect jobs in Europe. This position has been achieved through continued miniaturization in complementary metal-oxide-semiconductor (CMOS) technology, which will only last for a maximum 10-15 more years. In line with its Lisbon Strategy, the EC has identified an urgent need to assess possible technology solutions for the 'Beyond CMOS' era to meet the challenges of global competition.nnThe major ICT challenge is to find alternatives for information processing and storage beyond the limits of existing CMOS. Graphene, ultrathin layers of carbon, is particularly promising due its novel electronic properties. Initial data indicates that graphene is a prime candidate for 'Beyond CMOS' switches and interconnects, and is, despite its revolutionary nature, complementary to conventional CMOS.nnThe key objective of the GRAND proposal is to verify and assess whether graphene can bring conventional semiconductor technology to the 'Beyond CMOS' era. GRAND is thus positioned to act as a pathfinder for key ICT challenges.nnThe GRAND consortium will develop industry-compatible strategies for fabrication of 2D graphene nanostructures (widths down to the 5 nm scale) for switches and interconnects. Edge states, critical for transport at this scale, will be manipulated by functionalization methods. Device transport properties will be experimentally evaluated, complemented by a range of modelling techniques including simplified Monte Carlo models to describe scattering and hot phonon effects, as well as atomistic and ab-initio methods for band structure calculations. nnThe consortium includes internationally renowned experimental and theoretical groups from academia and industry, forming a comprehensive unit with capabilities far beyond those of the individual partners, and ensuring a tight focus on the exploitation of the project results for European industry.