NAVOLCHI
Nano Scale Disruptive Silicon-Plasmonic Platform for Chip-to-Chip Interconnection
| Coordinatore | Karlsruher Institut fuer Technologie
Organization address
address: Hermann-von-Helmholtz-Platz 1 contact info |
| Nazionalità Coordinatore | Germany [DE] |
| Totale costo | 3˙393˙437 € |
| EC contributo | 2˙400˙000 € |
| Programma | FP7-ICT
Specific Programme "Cooperation": Information and communication technologies |
| Code Call | FP7-ICT-2011-7 |
| Funding Scheme | CP |
| Anno di inizio | 2011 |
| Periodo (anno-mese-giorno) | 2011-11-01 - 2014-10-31 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
Karlsruher Institut fuer Technologie
Organization address
address: Hermann-von-Helmholtz-Platz 1 contact info |
DE (Eggenstein-Leopoldshafen) | coordinator | 0.00 |
| 2 |
INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW
Organization address
address: Kapeldreef 75 contact info |
BE (LEUVEN) | participant | 0.00 |
| 3 |
RESEARCH AND EDUCATION LABORATORY IN INFORMATION TECHNOLOGIES
Organization address
address: Adrianiou 2 & Papada contact info |
EL (Athens) | participant | 0.00 |
| 4 |
STMICROELECTRONICS SRL
Organization address
address: VIA C.OLIVETTI 2 contact info |
IT (AGRATE BRIANZA) | participant | 0.00 |
| 5 |
TECHNISCHE UNIVERSITEIT EINDHOVEN
Organization address
address: DEN DOLECH 2 contact info |
NL (EINDHOVEN) | participant | 0.00 |
| 6 |
UNIVERSITAT DE VALENCIA
Organization address
address: AVENIDA BLASCO IBANEZ 13 contact info |
ES (VALENCIA) | participant | 0.00 |
| 7 |
UNIVERSITEIT GENT
Organization address
address: SINT PIETERSNIEUWSTRAAT 25 contact info |
BE (GENT) | participant | 0.00 |
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Obiettivo del progetto (Objective)
The NAVOLCHI project explores, develops and demonstrates a novel nano-scale plasmonic chip-to-chip and system-in-package interconnection platform to overcome the bandwidth, foot-print and power consumption limitations of todays electrical and optical interconnect solutions. The technology exploits the ultra-compact dimensions and fast electronic interaction times offered by surface plasmon polaritons to build plasmonic transceivers with a few square-micron footprints and speeds only limited by the RC constants. Key elements developed in this project are monolithically integrated plasmonic lasers, modulators, amplifiers and detectors on a CMOS platform. The transceivers will be interconnected by free space and fiber connect schemes. The plasmonic transceiver concept aims at overcoming the challenges posed by the need for massive parallel interchip communications. Yet, it is more fundamental as the availability of cheap miniturized transmitters and detectors on a single chip will enable new applications in sensing, biomedical testing and many other fields where masses of lasers and detectors are need to e.g. analyze samples. Economically, the suggested technology is a viable approach for a massive monolithic integration of optoelectronic functions on Si substrates as it relies to the most part on the standardized processes offered by the silicon industry. In addition, the design and production cost of plasmonic devices are extremely low and with the dimension 100 times smaller over conventional devices they will require much lower energy to transfer data over short ranges of multi-processor cluster systems. The project is disruptive and challenging but it is clearly within the area of expertise of the consortium. It actually builds on the partners prior art such as demonstration of the first nano-scale plasmonic pillar laser. This project has the potential to create novel high-impact technologies by taking advantage of the manifold possibilities offered by plasmonic effects.