DSPACE
DSP for Space Applications
| Coordinatore | SITAEL SPA
Organization address
address: VIA S SABINO 21 contact info |
| Nazionalità Coordinatore | Italy [IT] |
| Sito del progetto | http://www.dspace-project.eu |
| Totale costo | 1˙605˙224 € |
| EC contributo | 1˙177˙067 € |
| Programma | FP7-SPACE
Specific Programme "Cooperation": Space |
| Code Call | FP7-SPACE-2010-1 |
| Funding Scheme | CP |
| Anno di inizio | 2011 |
| Periodo (anno-mese-giorno) | 2011-07-01 - 2013-09-30 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
SITAEL SPA
Organization address
address: VIA S SABINO 21 contact info |
IT (MOLA DI BARI) | coordinator | 344˙000.00 |
| 2 |
SPACE APPLICATIONS SERVICES NV
Organization address
address: "Leuvensesteenweg, 325" contact info |
BE (ZAVENTEM) | participant | 259˙301.50 |
| 3 |
RHEINISCH-WESTFAELISCHE TECHNISCHE HOCHSCHULE AACHEN
Organization address
address: Templergraben 55 contact info |
DE (AACHEN) | participant | 241˙480.00 |
| 4 |
UNIVERSITA DI PISA
Organization address
address: Lungarno Pacinotti 43/44 contact info |
IT (PISA) | participant | 125˙507.10 |
| 5 |
INTECS SPA
Organization address
address: SALITA DEL POGGIO LAURENTINO 7 contact info |
IT (ROMA) | participant | 77˙610.04 |
| 6 |
PARTECIPAZIONI TECNOLOGICHE SPA
Organization address
address: SALITA DEL POGGIO LAURENTINO 7 contact info |
IT (ROMA) | participant | 67˙595.96 |
| 7 |
CONSORZIO PISA RICERCHE SCARL
Organization address
address: Corso Italia contact info |
IT (PISA) | participant | 61˙572.90 |
| 8 |
SITAEL AEROSPACE SRL
Organization address
address: VIA LIVORNESE 1019 contact info |
IT (PISA) | participant | 0.00 |
Mappa
Word cloud
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Obiettivo del progetto (Objective)
'New Earth observation, atmospheric sounding, planetary exploration and generally scientific missions require the capability to handle large amount of data and to process them on-board applying both first level trigger procedure and compression algorithm. The always bigger data flow requests an high on-board numerical calculation capability in order to elaborate the acquired information before sending them to the Earth.
Available DSP based modules offer a typical computing power of 20 MIPS and more noticeably 20 to 60 MFLOPS. Although it was considered sufficient a few years ago, future applications will require much higher computing power.
This requirement, together with the strong need to reduce the dependence on critical technologies from outside Europe, makes mandatory the development of next generation of European general-purpose high performance DSPs with a linked efficient and reliable SW application development environment. DSPACE project aims to develop a high performance DSP for space application up to 1 GFLOPS that, meeting the scalability, multi-purpose and usability features, is conceived to be used both as stand-alone signal processor into embedded systems and as building component for increasing the computational capability.
A new DSP Core will be designed taking into account requirement and limitation due to European actual space technology. A complete front/back-end software environment, including a low level code optimiser layer, is expected to be developed together with benchmarks representative of common space scenarios. The DSPACE core will be housed on FPGA demonstrator board and made available with complete SW Development Environment.'
Introduzione (Teaser)
A mixed-design approach adopted by EU-funded companies and researchers allowed a first step in the creation of reliable European high-performance digital signal processor (DSP) able to meet the requirements of future space missions.